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Intel completely disables AVX-512 on Alder Lake after all

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Re: Intel completely disables AVX-512 on Alder Lake after all

#221

Post by Iwan-Zotow »

avx512 wrote: post #139
alkonaut wrote: post #60

Do both E and P cores handle avx instructions or are some instructions specific to p-cores? In that case, how does a processor with heterogeneous cores deal with processes (or, how does the OS/driver do it in automatic mode when affinity isn’t guided)?

The elephant in the room is the classic CPU architecture mistake where you use two different instruction sets on your performance and efficiency cores. There is no way to prevent code with AVX-512 instructions from being executed on an unsupported core. This exact same problem that plagued early ARM big.LITTLE designs that used ARMv8.2 on the performance core but ARM8.0 on the efficiency core, forcing all code to use…

Yeah, it killed heterogenic MPI clusters before as well

Re: Intel completely disables AVX-512 on Alder Lake after all

#222

Post by dragontamer »

CodesInChaos wrote: post #141
nullifidian wrote: post #94

Earlier quoted context omitted.

It doesn't provide any advantages because there is no install base, so desktop software doesn't utilize it. It's just a wider SIMD instruction set, and I'm confused why people relegate it to HPC only category.

AFAIK it downclocks the CPU, even if the AVX512 instructions are only a tiny fraction of instructions. So you only benefit from AVX512 if you use it enough. While 128 bit SIMD give you a speedup if you use it for a few functions that need it, without slowing down the rest of your code or even unrelated applications.

There's significant downclocking only on on Skylake-X (aka: 1st generation teething problems).

On more recent cores, there's only ~100 MHz of downclocking, which is so small you can pretty much ignore it.

Re: Intel completely disables AVX-512 on Alder Lake after all

#223

Post by kmeisthax »

ClumsyPilot wrote: post #88
marcan_42 wrote: post #38

Earlier quoted context omitted.

Don't forget it's not just instruction sets; Intel is the reason we don't have ECC RAM on desktops. Every other high density storage technology has used error correction for a decade or two, but we're still sitting here pretending we can have 512 billion bits of perfect memory sitting around that will never go wrong, because Intel fuse it off on desktop chips. I guess only servers need to be reliable. AMD supports EC…

"pretending we can have 512 billion bits of perfect memory sitting around that will never go wrong, because Intel fuse it off on desktop chips" I think computers are now so important to our life, we need to start regulating them like we do cars. Start seriously slapping companies that deliberately or negligently release equipment with obsolete kernels and security holes, mandate ECC like we mandate ABS, mandate part…

My main worry with this sort of thing, is that if we start mandating legal liability, and security becomes a compliance line-item, then companies are going to start locking down everything they ship so they have a legal defense in court. The argument's going to be, "if we are liable for shipping insecure desktops then you shouldn't be allowed to install Linux onto them and then sue us when you get hacked".

Think about how many laptops ship with Wi-Fi whitelists with the excuse of "FCC certification". It doesn't matter that the FCC doesn't actually prohibit users from swapping out Wi-Fi cards; manufacturers will do it anyway.

Re: Intel completely disables AVX-512 on Alder Lake after all

#224

Post by junon »

vardump wrote: post #147
formerly_proven wrote: post #73

Earlier quoted context omitted.

I've voiced this before but I think AVX-512 is completely irrelevant in the consumer space (which imho makes titles like "Intel artificially slows 12th gen down" incredulous). Even for commercial applications - sure there are some things that benefit from it. On the other hand, I work in HPC and even in (commercial, not nuke simulations or whatever the nuke powers do with their supercomputers) HPC applications AVX-51…

I could absolutely make a good use of AVX-512 for a lot of applications, including consumer space. It's even better than AVX2 when it comes to flexibility, and of course, it's double width. Of course because of lower clock speed and the associated penalties limit it a bit. But you can work around those limitations, for example perhaps by dynamically switching between AVX2 and AVX-512 paths depending on workload.

Thing is, you probably wouldn't use most of the AVX-512 instructions even provided. Some of them are ridiculously niche to the point I'd be really curious how anyone has actually used them.

Re: Intel completely disables AVX-512 on Alder Lake after all

#225

Post by rbobby »

marcan_42 wrote: post #38
SkeuomorphicBee wrote: post #10

Stuff like this is why I plan to never buy Intel ever again. I always disliked Intel's strategy for market segmentation by disabling specific instructions, I much prefer AMD's strategy of segmenting just by speed and number of cores. It is really annoying that with Intel you can't run the same program on the server and on your desktop, it makes development and testing a huge pain.

Don't forget it's not just instruction sets; Intel is the reason we don't have ECC RAM on desktops. Every other high density storage technology has used error correction for a decade or two, but we're still sitting here pretending we can have 512 billion bits of perfect memory sitting around that will never go wrong, because Intel fuse it off on desktop chips. I guess only servers need to be reliable. AMD supports EC…

> AMD supports ECC on their consumer chips

And now the next desktop consumer upgrade I purchase will be AMD and will have ECC (well... unless it's way more expensive).

Re: Intel completely disables AVX-512 on Alder Lake after all

#226

Post by 1_player »

eulers_secret wrote: post #169
jacquesm wrote: post #166

Earlier quoted context omitted.

I've been using Nvidia cards for years on Linux and never had a single problem.

I’ve used Nvidia on Linux since owning a 670. Their proprietary driver works only OK. You don’t get flipped off by Linus T for having good drivers. You also don’t have to wait years for wayland to work if your driver is good.

They didn't get flipped off for having bad drivers. They got flipped off for having closed source off-tree drivers.

The NVIDIA driver on Linux is extremely good and in my experience of better quality than AMD, but sorely lacking in modern features such as Wayland support. We still don't have decent hardware encoding nor raytracing support on AMD, the champions of free software, while DLSS and NVENC have been running on Linux for a while now.

I run AMD GPUs now but I'm quite done with the NVIDIA hate boner the Linux world has.

Re: Intel completely disables AVX-512 on Alder Lake after all

#227

Post by ineedasername »

SkeuomorphicBee wrote: post #10

Stuff like this is why I plan to never buy Intel ever again. I always disliked Intel's strategy for market segmentation by disabling specific instructions, I much prefer AMD's strategy of segmenting just by speed and number of cores. It is really annoying that with Intel you can't run the same program on the server and on your desktop, it makes development and testing a huge pain.

Didn't AMD disable cores on chips that were enabled and the exact same chips branded higher end? [0]

I know the explanation in some cases were that they didn't pass QC, but I also never came across stories of widespread problems when these cores were reenabled by end users.

If Intel is playing games here, I'm not sure they're unique to Intel.

[0] https://www.techradar.com/news/computing-components/processo...

[1] partial list of prior unlockable AMD chips: https://docs.google.com/spreadsheets/d/19Ms49ip5PBB7nYnf5urx...

Re: Intel completely disables AVX-512 on Alder Lake after all

#229

Post by simoncion »

marcan_42 wrote: post #93
PragmaticPulp wrote: post #79

Earlier quoted context omitted.

> I'm blaming the decade+ of Intel dominance for killing any chance of ECC becoming popular in non-server environments I disagree. AMD has offered ECC support for a while and it’s not catching on. It doesn’t make sense to blame this on Intel. > Motherboard traces are ~free and the feature is in the die already, so it requires zero expense to offer it to consumers. Yet it’s missing from a substantial number of AMD boa…

> Traces aren’t entirely free. Modern boards are densely packed and manufacturers aren’t interested in spending extra time on routing for a feature that consumers aren’t interested in anyway. Or they just don't care because it's not already popular and unbuffered ECC RAM isn't even particularly widely available. The delta design cost of routing another 8 data lines per DIMM channel is tiny. Especially on ATX boards a…

> ...unbuffered ECC RAM isn't even particularly widely available.

Every time I've gone looking for unbuffered ECC RAM over the past three or five years, I've had no trouble finding it. In my experience, the trick is to shop for "server" RAM, rather than "desktop" RAM.

Are there speeds or capacities here that you'd particularly like to see that aren't present? https://nemixram.com/server-memory/ecc-udimm/>

Re: Intel completely disables AVX-512 on Alder Lake after all

#230

Post by pantalaimon »

jeffbee wrote: post #201
blacklion wrote: post #198

Earlier quoted context omitted.

It is irrelevant because it is not wide-spread. AVX-512 is much nicer to program than nay previous Intel's vector instructions. It will be relevant if programmer could assume, that 50% of her auditory has CPU with AVX-512. If I want to play with it (as programmer who is interested in DSP on generic-purpose hardware) I need to rent special cloud instance for very non-hobby-friendly price. Additionally, benchamrks (of…

If you just want to play with AVX-512, you can rent an Ice Lake Xeon on AWS EC2 for only 3¢/hour, which strikes me as very hobby-friendly pricing.

But why would you want to play around with AVX512 if you can't benefit from it on your local machine?
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