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Intel completely disables AVX-512 on Alder Lake after all

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Re: Intel completely disables AVX-512 on Alder Lake after all

#71

Post by PragmaticPulp »

SkeuomorphicBee wrote: post #10

Stuff like this is why I plan to never buy Intel ever again. I always disliked Intel's strategy for market segmentation by disabling specific instructions, I much prefer AMD's strategy of segmenting just by speed and number of cores. It is really annoying that with Intel you can't run the same program on the server and on your desktop, it makes development and testing a huge pain.

> I always disliked Intel's strategy for market segmentation by disabling specific instructions,

The efficiency cores don’t have AVX-512 because they’re low power, simplified cores.

This mod required disabling the efficiency cores, reducing core count anyway. It wasn’t actually a free upgrade.

> I much prefer AMD's strategy of segmenting just by speed and number of cores

I’ve been using ECC RAM with AMD consumer parts, but it’s not all smooth sailing. The ECC support in their consumer parts isn’t officially supported, so it has been extremely difficult to determine if it’s even working at all. There are long forum threads where many people have tried to confirm it with mixed results. AMD may unofficially leave these features in place, but it turns out unofficial support isn’t all that straightforward.

Re: Intel completely disables AVX-512 on Alder Lake after all

#72

Post by zinekeller »

bravo22 wrote: post #56
zinekeller wrote: post #19

Earlier quoted context omitted.

I'll be honest, this looks to be a simple mistake. Cutting AVX-512 literally (meaning in hardware) requires actual staff doing that cut plus it'll increase turnaround times, plus the efficiency cores don't have it. Unlike "let's bin perfectly functional processors into a lower-cored product", this is economically not logical for Intel, which often is the closest from the truth.

"cuts" are almost always fuses that are blown by ATEs during wafer manufacturing or post packaging tests. It is a bit flip. There is no extra cost.

And if it wasn't designed to be "blowed up" in the first place, in the hopes that the E-cores do have AVX-512? In that case, it's a literal cut and not simply blowing the fuse.

Re: Intel completely disables AVX-512 on Alder Lake after all

#73

Post by formerly_proven »

codeflo wrote: post #11

If all of this was planned (and I’m not saying it is), that would have been very clever. It would work like this: 1. You “accidentally forget” to disable the feature in hardware. Given how competitive the market is, motherboard manufacturers can be relied upon to enable it in their “1337 OVERCLOCKZ” mode. No conspiracy is needed. 2. You “tolerate” this practice just long enough to win the critical initial wave of rev…

I've voiced this before but I think AVX-512 is completely irrelevant in the consumer space (which imho makes titles like "Intel artificially slows 12th gen down" incredulous). Even for commercial applications - sure there are some things that benefit from it. On the other hand, I work in HPC and even in (commercial, not nuke simulations or whatever the nuke powers do with their supercomputers) HPC applications AVX-512 is rarely used.

Also... AVX-512 was never announced for 12th gen. No one claimed it was there, would work, would be stable or anything to that tune. No one should have had an expectation that a 12th gen CPU would do AVX-512 (and no one did). Intel even explicitly said pre-launch that it won't do AVX-512. Some people found post-launch that some BIOSes allow you to turn the E-cores off and that causes AVX-512 to be detected. IIRC not even the BIOS option claimed anything about AVX-512.

There are a lot one can criticize about Intel. Many low hanging fruits. This isn't one of them.

Re: Intel completely disables AVX-512 on Alder Lake after all

#74

Post by marcan_42 »

PragmaticPulp wrote: post #67
marcan_42 wrote: post #38

Earlier quoted context omitted.

Don't forget it's not just instruction sets; Intel is the reason we don't have ECC RAM on desktops. Every other high density storage technology has used error correction for a decade or two, but we're still sitting here pretending we can have 512 billion bits of perfect memory sitting around that will never go wrong, because Intel fuse it off on desktop chips. I guess only servers need to be reliable. AMD supports EC…

> Intel is the reason we don't have ECC RAM on desktops. Intel has offered ECC support in a lot of their low-end i3 parts for a long time. They’re popular for budget server builds for this reason. The real reason people don’t use ECC is because they don’t like paying extra for consumer builds. That’s all. ECC requires more chips, more traces, and more expense. Consumers can’t tell if there’s a benefit, so they skip i…

> You’re blaming Intel’s CPU lineup for people not using ECC RAM on their AMD builds?

I'm blaming the decade+ of Intel dominance for killing any chance of ECC becoming popular in non-server environments, just as RAM density was reaching the point where it is absolutely essential for reliability.

> The real reason people don’t use ECC is because they don’t like paying extra for consumer builds. That’s all. ECC requires more chips, more traces, and more expense. Consumers can’t tell if there’s a benefit, so they skip it.

Motherboard traces are ~free and the feature is in the die already, so it requires zero expense to offer it to consumers. Intel chose to artificially cripple their chips to remove that option. Yes, I know there are a few oddball lines where they did offer it. They should have offered it across the board from the get go, seeing as they were selling the same dies with ECC for workstation use.

Re: Intel completely disables AVX-512 on Alder Lake after all

#75

Post by stransky »

philliphaydon wrote: post #53
Fnoord wrote: post #42

Earlier quoted context omitted.

Yeah, AMD Ryzen Framework laptop would be amazing. (Would also have ECC support?) They'd have to license TB from Intel. I don't know about TB4, but TB3 is royalty-free, just gotta pass a certification. TB3 or better would be great for eGPUs in general. Not sure I personally would need TB4. Also, I wonder if Framework would be usable with say Proxmox and macOS (or 'native' Hackintosh?)

The ryzen 6000 series for laptops will support usb 4 with tb3. What does tb4 offer over 3?

longer cables

Re: Intel completely disables AVX-512 on Alder Lake after all

#76

Post by PragmaticPulp »

sesuximo wrote: post #14

Really missed an opportunity to give something to people for free

No, the AVX-512 instructions weren’t free. You had to disable all of the E cores. It only made sense if you could afford to give up the extra cores to accelerate a few instructions in a smaller number of threads.

It wasn’t a net win for the average person. I doubt many people would ever do this.

Re: Intel completely disables AVX-512 on Alder Lake after all

#77

Post by Karunamon »

marcan_42 wrote: post #74
PragmaticPulp wrote: post #67

Earlier quoted context omitted.

> Intel is the reason we don't have ECC RAM on desktops. Intel has offered ECC support in a lot of their low-end i3 parts for a long time. They’re popular for budget server builds for this reason. The real reason people don’t use ECC is because they don’t like paying extra for consumer builds. That’s all. ECC requires more chips, more traces, and more expense. Consumers can’t tell if there’s a benefit, so they skip i…

> You’re blaming Intel’s CPU lineup for people not using ECC RAM on their AMD builds? I'm blaming the decade+ of Intel dominance for killing any chance of ECC becoming popular in non-server environments, just as RAM density was reaching the point where it is absolutely essential for reliability. > The real reason people don’t use ECC is because they don’t like paying extra for consumer builds. That’s all. ECC require…

ECC memory on the other hand is always going to be more expensive.

Re: Intel completely disables AVX-512 on Alder Lake after all

#78

Post by tomxor »

qayxc wrote: post #34
marcan_42 wrote: post #28

Earlier quoted context omitted.

You can only upgrade microcode on any given boot, not downgrade it. Therefore, if the BIOS has already upgraded your microcode for you on boot, you can't undo that from the OS.

The BIOS doesn't upgrade microcode - the OS does. During boot there's usually no network connectivity, so how would the BIOS even know of an update, let alone acquire it?

They both have the opportunity to upgrade it.

The BIOS holds a copy of the microcode and this can be upgraded by upgrading the BIOS/EFI (bundled with BIOS updates). The same for the OS.

On boot the BIOS loads it's update first, then the OS, provided each is newer than the currently loaded microcode.

So the idea is that if you don't like this update, you need to prevent your BIOS from updating (or downgrade it), and then also configure Linux to ether not upload it's microcode, or load a specific one.

Re: Intel completely disables AVX-512 on Alder Lake after all

#79

Post by PragmaticPulp »

marcan_42 wrote: post #74
PragmaticPulp wrote: post #67

Earlier quoted context omitted.

> Intel is the reason we don't have ECC RAM on desktops. Intel has offered ECC support in a lot of their low-end i3 parts for a long time. They’re popular for budget server builds for this reason. The real reason people don’t use ECC is because they don’t like paying extra for consumer builds. That’s all. ECC requires more chips, more traces, and more expense. Consumers can’t tell if there’s a benefit, so they skip i…

> You’re blaming Intel’s CPU lineup for people not using ECC RAM on their AMD builds? I'm blaming the decade+ of Intel dominance for killing any chance of ECC becoming popular in non-server environments, just as RAM density was reaching the point where it is absolutely essential for reliability. > The real reason people don’t use ECC is because they don’t like paying extra for consumer builds. That’s all. ECC require…

> I'm blaming the decade+ of Intel dominance for killing any chance of ECC becoming popular in non-server environments

I disagree. AMD has offered ECC support for a while and it’s not catching on. It doesn’t make sense to blame this on Intel.

> Motherboard traces are ~free and the feature is in the die already, so it requires zero expense to offer it to consumers.

Yet it’s missing from a substantial number of AMD boards, despite being supported. You have to specifically confirm the motherboard added those traces before buying it.

Traces aren’t entirely free. Modern boards are densely packed and manufacturers aren’t interested in spending extra time on routing for a feature that consumers aren’t interested in anyway.

Re: Intel completely disables AVX-512 on Alder Lake after all

#80

Post by neogodless »

philliphaydon wrote: post #53
Fnoord wrote: post #42

Earlier quoted context omitted.

Yeah, AMD Ryzen Framework laptop would be amazing. (Would also have ECC support?) They'd have to license TB from Intel. I don't know about TB4, but TB3 is royalty-free, just gotta pass a certification. TB3 or better would be great for eGPUs in general. Not sure I personally would need TB4. Also, I wonder if Framework would be usable with say Proxmox and macOS (or 'native' Hackintosh?)

The ryzen 6000 series for laptops will support usb 4 with tb3. What does tb4 offer over 3?

https://plugable.com/blogs/news/what-s-the-difference-betwee...

The short answer for Thunderbolt 4 over Thunderbolt 3 is "a second 4K display" thanks to double the PCIe bandwidth, 16Gbps vs 32Gbps. (The main data channel is 40Gbps in both.)

USB 4 is actually a bit more constrained than Thunderbolt 3, at 20Gbps data channel, and no guarantee of PCIe bandwidth.

> Thunderbolt 4 guarantees support for one 8K display or two 4K displays. A USB4 port can only support one display with no mention of resolution minimums. And even that isn't required as some USB4 ports will not support video at all.

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