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Intel completely disables AVX-512 on Alder Lake after all

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Re: Intel completely disables AVX-512 on Alder Lake after all

#91

Post by PragmaticPulp »

formerly_proven wrote: post #73
codeflo wrote: post #11

If all of this was planned (and I’m not saying it is), that would have been very clever. It would work like this: 1. You “accidentally forget” to disable the feature in hardware. Given how competitive the market is, motherboard manufacturers can be relied upon to enable it in their “1337 OVERCLOCKZ” mode. No conspiracy is needed. 2. You “tolerate” this practice just long enough to win the critical initial wave of rev…

I've voiced this before but I think AVX-512 is completely irrelevant in the consumer space (which imho makes titles like "Intel artificially slows 12th gen down" incredulous). Even for commercial applications - sure there are some things that benefit from it. On the other hand, I work in HPC and even in (commercial, not nuke simulations or whatever the nuke powers do with their supercomputers) HPC applications AVX-51…

> I've voiced this before but I think AVX-512 is completely irrelevant in the consumer spac

Don’t forget that reviewers made a huge deal out of the fact that CPUs downclock themselves when running AVX instructions.

Several reviewers tried to make this into some sort of scandal at the time, which I’d guess contributed to Intel wanting to remove the feature from consumer CPUs.

Of course, many of those same reviewers are now capitalizing on Intel removing AVX-512 support while ignoring the fact that you had to disable all of the efficiency cores if you wanted that feature (worsening thermals and performance in non-AVX) workloads.

Re: Intel completely disables AVX-512 on Alder Lake after all

#92

Post by PragmaticPulp »

fivea wrote: post #82
formerly_proven wrote: post #73

Earlier quoted context omitted.

I've voiced this before but I think AVX-512 is completely irrelevant in the consumer space (which imho makes titles like "Intel artificially slows 12th gen down" incredulous). Even for commercial applications - sure there are some things that benefit from it. On the other hand, I work in HPC and even in (commercial, not nuke simulations or whatever the nuke powers do with their supercomputers) HPC applications AVX-51…

Quoted post unavailable.

> What matters is whether consumers were defrauded by seeing a feature they bought

Nobody was defrauded.

The CPU never advertised AVX-512 support. You could never enable it “for free”. You had to disable the efficiency cores and use a BIOS where the manufacturers simply forgot to turn it off.

There is no fraud here and it’s weird to claim as much.

Re: Intel completely disables AVX-512 on Alder Lake after all

#93

Post by marcan_42 »

PragmaticPulp wrote: post #79
marcan_42 wrote: post #74

Earlier quoted context omitted.

> You’re blaming Intel’s CPU lineup for people not using ECC RAM on their AMD builds? I'm blaming the decade+ of Intel dominance for killing any chance of ECC becoming popular in non-server environments, just as RAM density was reaching the point where it is absolutely essential for reliability. > The real reason people don’t use ECC is because they don’t like paying extra for consumer builds. That’s all. ECC require…

> I'm blaming the decade+ of Intel dominance for killing any chance of ECC becoming popular in non-server environments I disagree. AMD has offered ECC support for a while and it’s not catching on. It doesn’t make sense to blame this on Intel. > Motherboard traces are ~free and the feature is in the die already, so it requires zero expense to offer it to consumers. Yet it’s missing from a substantial number of AMD boa…

> Traces aren’t entirely free. Modern boards are densely packed and manufacturers aren’t interested in spending extra time on routing for a feature that consumers aren’t interested in anyway.

Or they just don't care because it's not already popular and unbuffered ECC RAM isn't even particularly widely available. The delta design cost of routing another 8 data lines per DIMM channel is tiny. Especially on ATX boards and other larger formats. I could see some crazy packed mini-ITX layout where this might be a bit harder, but definitely not in the normal cases.

(I've routed a rather dense 4-layer BGA credit card sized board; not exactly a motherboard, but I do have a bit of experience with this subject. It was definitely denser than a typical ATX board per layer.)

Re: Intel completely disables AVX-512 on Alder Lake after all

#94

Post by nullifidian »

qayxc wrote: post #18

Much ado about nothing, IMHO. AVX-512 isn't advertised by Intel as a 12th gen desktop CPU feature and doesn't provide any advantages for most desktop users anyway. Sure, there's niche applications like some particular PS3 emulator, but I don't share the author's opinion w.r.t. to performance and efficiency in desktop use.

It doesn't provide any advantages because there is no install base, so desktop software doesn't utilize it. It's just a wider SIMD instruction set, and I'm confused why people relegate it to HPC only category.

Re: Intel completely disables AVX-512 on Alder Lake after all

#96

Post by marcan_42 »

formerly_proven wrote: post #89
marcan_42 wrote: post #38

Earlier quoted context omitted.

Don't forget it's not just instruction sets; Intel is the reason we don't have ECC RAM on desktops. Every other high density storage technology has used error correction for a decade or two, but we're still sitting here pretending we can have 512 billion bits of perfect memory sitting around that will never go wrong, because Intel fuse it off on desktop chips. I guess only servers need to be reliable. AMD supports EC…

> Don't forget it's not just instruction sets; Intel is the reason we don't have ECC RAM on desktops. Every other high density storage technology has used error correction for a decade or two, but we're still sitting here pretending we can have 512 billion bits of perfect memory sitting around that will never go wrong, because Intel fuse it off on desktop chips. I guess only servers need to be reliable. And not just…

Yup. PCIe will practically run over wet string, thanks to error detection and retransmits and other reasons, but try having a marginal DRAM bus and see how much fun that is...

Re: Intel completely disables AVX-512 on Alder Lake after all

#98

Post by formerly_proven »

PragmaticPulp wrote: post #67
marcan_42 wrote: post #38

Earlier quoted context omitted.

Don't forget it's not just instruction sets; Intel is the reason we don't have ECC RAM on desktops. Every other high density storage technology has used error correction for a decade or two, but we're still sitting here pretending we can have 512 billion bits of perfect memory sitting around that will never go wrong, because Intel fuse it off on desktop chips. I guess only servers need to be reliable. AMD supports EC…

> Intel is the reason we don't have ECC RAM on desktops. Intel has offered ECC support in a lot of their low-end i3 parts for a long time. They’re popular for budget server builds for this reason. The real reason people don’t use ECC is because they don’t like paying extra for consumer builds. That’s all. ECC requires more chips, more traces, and more expense. Consumers can’t tell if there’s a benefit, so they skip i…

> Intel has offered ECC support in a lot of their low-end i3 parts for a long time. They’re popular for budget server builds for this reason.

Intel removed ECC support in the 10th gen so you have to go for Xeon nowadays.

Re: Intel completely disables AVX-512 on Alder Lake after all

#99

Post by marcan_42 »

PragmaticPulp wrote: post #71
SkeuomorphicBee wrote: post #10

Stuff like this is why I plan to never buy Intel ever again. I always disliked Intel's strategy for market segmentation by disabling specific instructions, I much prefer AMD's strategy of segmenting just by speed and number of cores. It is really annoying that with Intel you can't run the same program on the server and on your desktop, it makes development and testing a huge pain.

> I always disliked Intel's strategy for market segmentation by disabling specific instructions, The efficiency cores don’t have AVX-512 because they’re low power, simplified cores. This mod required disabling the efficiency cores, reducing core count anyway. It wasn’t actually a free upgrade. > I much prefer AMD's strategy of segmenting just by speed and number of cores I’ve been using ECC RAM with AMD consumer part…

It's not "unofficial" support, it's just the motherboards/OEMs don't bother to implement it or implement it in an opaque way. All the motherboards have to do to support this properly is have the extra RAM traces and an easy setup menu info line that tells you whether ECC is on or not. The CPU supports it fine.

If you run Linux, you can use dmidecode and the EDAC driver to confirm if you have ECC enabled.

Re: Intel completely disables AVX-512 on Alder Lake after all

#100

Post by fivea »

qayxc wrote: post #39
pantalaimon wrote: post #31

Earlier quoted context omitted.

Then why not leave it as an option for people who want to experiment with the feature?

One word: support. Once you advertise a feature, you have to support it. It'd be pretty damn hard for Intel to explain why lower tier i5 and i3 CPUs have a feature that higher tier i7 and i9 SKUs are missing unless you jump through hoops via hardware (e.g. disable E-cores) or software (e.g. making sure to only run your process on P-cores). If you want to experiment with AVX-512, just get an older CPU. Much less hassl…

> One word: support.

That hypothesis is not credible. They can simply declare a feature is unsupported, and even that using it voids some guarantee. I mean, look at how overclocking is handled.

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