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Intel completely disables AVX-512 on Alder Lake after all

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Re: Intel completely disables AVX-512 on Alder Lake after all

#81

Post by hetspookjee »

Fnoord wrote: post #51
jacquesm wrote: post #30

Earlier quoted context omitted.

Yes, but with NVidia at least they get it right and do it prior to benchmarking and selling into the retail channel, rather than the other way around. And they - rightly - get plenty of flak for it.

Nvidia is great for Windows. As soon as you want to use Linux or macOS or Proxmox or anything, prepare for trouble. Its just not a FOSS-friendly company. Even on the Nvidia Shield TV (a great bang for the buck) they added commercials in the new UI. Though one might attribute that to Google, it is the only Nvidia device I bought past 5 years. And the only one which got a feature downgrade (or upgrade with a feature I…

haha it's staggering how big the presence of NVIDIA is in the deep learning community, yet after all these years it's still a painful process to get all the drivers up and running in the correct way. Their documentation surroundg CUDA and CUDNN are often out of date and/ or incomplete. Staggering

Re: Intel completely disables AVX-512 on Alder Lake after all

#82

Post by fivea »

formerly_proven wrote: post #73
codeflo wrote: post #11

If all of this was planned (and I’m not saying it is), that would have been very clever. It would work like this: 1. You “accidentally forget” to disable the feature in hardware. Given how competitive the market is, motherboard manufacturers can be relied upon to enable it in their “1337 OVERCLOCKZ” mode. No conspiracy is needed. 2. You “tolerate” this practice just long enough to win the critical initial wave of rev…

I've voiced this before but I think AVX-512 is completely irrelevant in the consumer space (which imho makes titles like "Intel artificially slows 12th gen down" incredulous). Even for commercial applications - sure there are some things that benefit from it. On the other hand, I work in HPC and even in (commercial, not nuke simulations or whatever the nuke powers do with their supercomputers) HPC applications AVX-51…

No post body was provided.

Re: Intel completely disables AVX-512 on Alder Lake after all

#83

Post by marcan_42 »

zinekeller wrote: post #72
bravo22 wrote: post #56

Earlier quoted context omitted.

"cuts" are almost always fuses that are blown by ATEs during wafer manufacturing or post packaging tests. It is a bit flip. There is no extra cost.

And if it wasn't designed to be "blowed up" in the first place, in the hopes that the E-cores do have AVX-512? In that case, it's a literal cut and not simply blowing the fuse.

They always have fuses for this stuff. They have fuses for everything. Modern silicon has piles and piles of chicken bits and fuses to make sure they cover all their bases. There is zero chance they didn't have a hard fuse to disable a known controversial/segmentable feature like AVX-512.

Re: Intel completely disables AVX-512 on Alder Lake after all

#84

Post by lsaferite »

philliphaydon wrote: post #53
Fnoord wrote: post #42

Earlier quoted context omitted.

Yeah, AMD Ryzen Framework laptop would be amazing. (Would also have ECC support?) They'd have to license TB from Intel. I don't know about TB4, but TB3 is royalty-free, just gotta pass a certification. TB3 or better would be great for eGPUs in general. Not sure I personally would need TB4. Also, I wonder if Framework would be usable with say Proxmox and macOS (or 'native' Hackintosh?)

The ryzen 6000 series for laptops will support usb 4 with tb3. What does tb4 offer over 3?

More guaranteed PCIe (32Gbps) bandwidth. Mandated wake from sleep over TB4 while closed. DMA Protection.

It's mostly the same though and devices should be cross-compatible.

Primarily you want TB4 for the stricter requirements for certification.

Re: Intel completely disables AVX-512 on Alder Lake after all

#85

Post by charcircuit »

fivea wrote: post #82
formerly_proven wrote: post #73

Earlier quoted context omitted.

I've voiced this before but I think AVX-512 is completely irrelevant in the consumer space (which imho makes titles like "Intel artificially slows 12th gen down" incredulous). Even for commercial applications - sure there are some things that benefit from it. On the other hand, I work in HPC and even in (commercial, not nuke simulations or whatever the nuke powers do with their supercomputers) HPC applications AVX-51…

Quoted post unavailable.

>by seeing a feature

The other person just said that the feature wasn't advertised. Most people would not be aware it was even possible.

Re: Intel completely disables AVX-512 on Alder Lake after all

#86

Post by PragmaticPulp »

codeflo wrote: post #11

If all of this was planned (and I’m not saying it is), that would have been very clever. It would work like this: 1. You “accidentally forget” to disable the feature in hardware. Given how competitive the market is, motherboard manufacturers can be relied upon to enable it in their “1337 OVERCLOCKZ” mode. No conspiracy is needed. 2. You “tolerate” this practice just long enough to win the critical initial wave of rev…

> 2. You “tolerate” this practice just long enough to win the critical initial wave of reviews and benchmarks. Interested buyers will look at those charts for years to come.

That’s not what happened here.

The AVX-512 instructions not only weren’t enabled by default, they couldn’t be enabled at all unless you went out of your way to disable the efficiency cores completely. They also wouldn’t benefit your workload unless disabling those extra cores was offset by the AVX-512 instructions on the remaining cores.

None of the benchmarks you saw in reviews or marketing material would have used these instructions unless specifically called out by the reviewers as having made all of these changes.

Benchmarks like the multi-core Geekbench would actually go down, not up, with this enabled because you’re giving up cores. Thermal performance would be worse because the efficiency cores were disabled.

Intel never marketed the part with AVX-512. It was discovered by a reviewer poking around in the BIOS of a review board.

> motherboard manufacturers can be relied upon to enable it in their “1337 OVERCLOCKZ” mode. No conspiracy is needed.

Nope. You had to disable cores to enable AVX-512 and I doubt it would show up in any gaming or consumer benchmarks as a positive.

The conspiracy theory about Intel doing this to mislead consumers not only doesn’t make sense, it’s completely wrong given how this worked and how it was discovered.

Re: Intel completely disables AVX-512 on Alder Lake after all

#87

Post by marcan_42 »

Karunamon wrote: post #77
marcan_42 wrote: post #74

Earlier quoted context omitted.

> You’re blaming Intel’s CPU lineup for people not using ECC RAM on their AMD builds? I'm blaming the decade+ of Intel dominance for killing any chance of ECC becoming popular in non-server environments, just as RAM density was reaching the point where it is absolutely essential for reliability. > The real reason people don’t use ECC is because they don’t like paying extra for consumer builds. That’s all. ECC require…

ECC memory on the other hand is always going to be more expensive.

Indeed, which is why it should be an option.

OTOH, it shouldn't be significantly more expensive. It should be ~9/8 the cost of regular memory. It's just one extra chip for every 8. Nothing more.

Re: Intel completely disables AVX-512 on Alder Lake after all

#88

Post by ClumsyPilot »

marcan_42 wrote: post #38
SkeuomorphicBee wrote: post #10

Stuff like this is why I plan to never buy Intel ever again. I always disliked Intel's strategy for market segmentation by disabling specific instructions, I much prefer AMD's strategy of segmenting just by speed and number of cores. It is really annoying that with Intel you can't run the same program on the server and on your desktop, it makes development and testing a huge pain.

Don't forget it's not just instruction sets; Intel is the reason we don't have ECC RAM on desktops. Every other high density storage technology has used error correction for a decade or two, but we're still sitting here pretending we can have 512 billion bits of perfect memory sitting around that will never go wrong, because Intel fuse it off on desktop chips. I guess only servers need to be reliable. AMD supports EC…

"pretending we can have 512 billion bits of perfect memory sitting around that will never go wrong, because Intel fuse it off on desktop chips"

I think computers are now so important to our life, we need to start regulating them like we do cars.

Start seriously slapping companies that deliberately or negligently release equipment with obsolete kernels and security holes, mandate ECC like we mandate ABS, mandate part avaliability for 10 years like we do with cars, etc.

Every day we let this this slide, thousands of people loose precious data and number of 'smart' toasters mining crypto increases.

Re: Intel completely disables AVX-512 on Alder Lake after all

#89

Post by formerly_proven »

marcan_42 wrote: post #38
SkeuomorphicBee wrote: post #10

Stuff like this is why I plan to never buy Intel ever again. I always disliked Intel's strategy for market segmentation by disabling specific instructions, I much prefer AMD's strategy of segmenting just by speed and number of cores. It is really annoying that with Intel you can't run the same program on the server and on your desktop, it makes development and testing a huge pain.

Don't forget it's not just instruction sets; Intel is the reason we don't have ECC RAM on desktops. Every other high density storage technology has used error correction for a decade or two, but we're still sitting here pretending we can have 512 billion bits of perfect memory sitting around that will never go wrong, because Intel fuse it off on desktop chips. I guess only servers need to be reliable. AMD supports EC…

> Don't forget it's not just instruction sets; Intel is the reason we don't have ECC RAM on desktops. Every other high density storage technology has used error correction for a decade or two, but we're still sitting here pretending we can have 512 billion bits of perfect memory sitting around that will never go wrong, because Intel fuse it off on desktop chips. I guess only servers need to be reliable.

And not just storage - the main memory bus is the only data bus in a modern computer that doesn't use some form of error correction or detection. Even USB 1.0 has a checksum. So everywhere else we use ECC/FEC or at least a checksum, be it PCIe, SATA, USB, all storage devices as you mentioned rely heavily on FEC, all CPU caches use ECC. Except the main memory and its bus. Where all data is moved through (eventually). D'uh.

Re: Intel completely disables AVX-512 on Alder Lake after all

#90

Post by nullifidian »

qayxc wrote: post #39
pantalaimon wrote: post #31

Earlier quoted context omitted.

Then why not leave it as an option for people who want to experiment with the feature?

One word: support. Once you advertise a feature, you have to support it. It'd be pretty damn hard for Intel to explain why lower tier i5 and i3 CPUs have a feature that higher tier i7 and i9 SKUs are missing unless you jump through hoops via hardware (e.g. disable E-cores) or software (e.g. making sure to only run your process on P-cores). If you want to experiment with AVX-512, just get an older CPU. Much less hassl…

They don't support CPUs that were overclocked, yet advertise that feature, so support isn't the reason.
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