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MIPS Becomes RISC-V

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151–160 of 225 posts

Re: MIPS Becomes RISC-V

#151
post #88

This is more or less analogous to Blackberry moving to Android, isn’t it? Storied, old-guard tech company loses most of its market share, trades in its first-party stack for a rising open-source alternative. Is MIPS still a big enough name to make this much of a coup for RISC-V? Or is this the last-ditch effort of a fallen star of the semi market?

Check your router's CPU. I own 4 routers and all of them use MIPS. RISC-V is more like Graphene, it's yet to leave the lab.

[deleted]

Re: MIPS Becomes RISC-V

#152

In 2010 MIPS wanted $2 million from Berkeley to allow them to use the MIPS instruction encodings for processor cores that Berkeley would design entirely themselves. So they made up their own encodings instead. The rest is history. In many ways modern MIPS and RISC-V are pretty much just different binary encodings of the same ideas. [this was already posted as a comment in a thread, but on reflection it probably deser…

> In 2010 MIPS wanted $2 million from Berkeley to allow them to use the MIPS instruction encodings

Do you have a source for that? I see that you're a RISC-V expert, and I know MIPS, Inc. is notorious for patent lawsuits, so I trust you. I'm just curious about the Berkeley project.

Re: MIPS Becomes RISC-V

#153
post #94
post #59

Earlier quoted context omitted.

We need diversity for solving different problems, not for diversity sake. What problem did MIPS solve in a unique way that others didn't? Because it wasn't desktop, mobile, embedded, graphics or AI.

MIPS and Berkeley RISC started an entire revolution. They appear "not unique" only because other ISAs copied them so thoroughly. I think it's safe to say that Alpha, ARM, POWER, PA-RISC, etc wouldn't have been designed as they were without MIPS. Even today, comparing modern MIPS64 and ARM aarch64, I find ARM's new ISA to be perhaps more similar to MIPS than to ARMv7.

I think POWER might have originally been an independent rediscovery of RISC actually, while designing some PBX system.

Re: MIPS Becomes RISC-V

#154
post #74

Everyone's right to celebrate the success of RISC-V, but part of me thinks it's a shame that there's relatively little architectural diversity ( edit I should have said ISA diversity ) in modern CPUs. MIPS, Alpha, and Super-H, have all but faded away. Power/PowerPC is still out there somewhere though. Apparently they're still working on SPARC, too. [0] At least we'll always have the PS2. ...until the last one breaks,…

I wish the barriers to using new architectures were lower. For instance, suppose binaries were typically distributed in a platform-agnostic format, like LLVM intermediate representation or something equivalent. When you run your program the first time, it's compiled to native code for your architecture and cached for later use. I realize I've sort of just re-invented Javascript. But what if we just did away with nati…

You've just reinvented bytecode. JVM/ART, WebAssembly, ActionScript, some versions of .net... You know, all the stuff that supposedly runs on everything.

Re: MIPS Becomes RISC-V

#155
post #33

Earlier quoted context omitted.

I have one of the purple MIPS SBCs from back when MIPS was briefly owned by Imagination ( https://en.wikipedia.org/wiki/Imagination_Creator https://elinux.org/MIPS_Creator_CI20 ). Slow as hell even back in 2014. I wonder if one day it'll be a museum piece :-?

Probably shortly after the Z80s I pulled out of a PBX back in 2000 thinking they'd be hard to come by and worth something some day.

You're telling me. I had a few Z80s in a tube for a while. I was hoping I'd get to sell them to NASA one day haha.

Re: MIPS Becomes RISC-V

#156
post #94
post #59

Earlier quoted context omitted.

We need diversity for solving different problems, not for diversity sake. What problem did MIPS solve in a unique way that others didn't? Because it wasn't desktop, mobile, embedded, graphics or AI.

MIPS and Berkeley RISC started an entire revolution. They appear "not unique" only because other ISAs copied them so thoroughly. I think it's safe to say that Alpha, ARM, POWER, PA-RISC, etc wouldn't have been designed as they were without MIPS. Even today, comparing modern MIPS64 and ARM aarch64, I find ARM's new ISA to be perhaps more similar to MIPS than to ARMv7.

> They appear "not unique" only because other ISAs copied them so thoroughly.

https://tvtropes.org/pmwiki/pmwiki.php/Main/SeinfeldIsUnfunn...

Re: MIPS Becomes RISC-V

#157
post #74

Earlier quoted context omitted.

I wish the barriers to using new architectures were lower. For instance, suppose binaries were typically distributed in a platform-agnostic format, like LLVM intermediate representation or something equivalent. When you run your program the first time, it's compiled to native code for your architecture and cached for later use. I realize I've sort of just re-invented Javascript. But what if we just did away with nati…

> I realize I've sort of just re-invented Javascript. You've re-invented UCSD P-code. https://en.wikipedia.org/wiki/P-code_machine

BCPL ocode is quite a bit older the UCSD P-code.

The BCPL compiler always outputs ocode. Then a back end for the particular system statically generates machine code (or assembly language)

Back in 1983 I helped take a BCPL running on a VAX and add a M6809 back end to it.

Re: MIPS Becomes RISC-V

#158

In 2010 MIPS wanted $2 million from Berkeley to allow them to use the MIPS instruction encodings for processor cores that Berkeley would design entirely themselves. So they made up their own encodings instead. The rest is history. In many ways modern MIPS and RISC-V are pretty much just different binary encodings of the same ideas. [this was already posted as a comment in a thread, but on reflection it probably deser…

> In 2010 MIPS wanted $2 million from Berkeley to allow them to use the MIPS instruction encodings Do you have a source for that? I see that you're a RISC-V expert, and I know MIPS, Inc. is notorious for patent lawsuits, so I trust you. I'm just curious about the Berkeley project.

Patterson always smirks when people ask him what the "V" is for, and mumbles an uncharacteristically vague reply (something about it being the fifth chip project he's worked on or something like that...)

It's no coincidence that MIPS used roman numerals for its architectures, MIPS-I, MIPS-II, MIPS-III, MIPS-IV, and MIPS-V.

So instead of using MIPS-V Berkeley created RISC-V.

You aren't going to get anybody who was involved to say this on the record -- that they changed just barely enough to evade the licensing (instruction encoding) and trademark ("MIPS-V") problems. Openly admitting in print that it was a "minimum noninfringing change" simply invites lawsuits claiming that they were one hair's width on the wrong side of that line.

Re: MIPS Becomes RISC-V

#159

Earlier quoted context omitted.

Probably shortly after the Z80s I pulled out of a PBX back in 2000 thinking they'd be hard to come by and worth something some day.

You're telling me. I had a few Z80s in a tube for a while. I was hoping I'd get to sell them to NASA one day haha.

I've seen listings on eBay for Intel 4004s, 8008s, and other chips at what seem like crazy prices. I wonder if anyone buys them.

Here's someone thinking they'll get $120 for an old Russian Z80 clone: https://www.ebay.com/itm/RARE-vintage-gold-cpu-ceramic-Zilog...

Re: MIPS Becomes RISC-V

#160
post #81

Earlier quoted context omitted.

Nope - they have different competing heritages - in this case the headline is "Berkeley beats Stanford" https://www.youtube.com/watch?v=09kPcg8Hehg

Academic RISC was designed by Patterson and Hennessy. Hennessy went off and was one of the founders of MIPS, Patterson is one of the instrumental leaders in the RISC-V space.

Patterson and Hennessy were in competition with each other, at different universities. It's only much later they wrote text books together.

Patterson says RISC-V is derived from RISC-I and RISC-II. I think this doesn't really old water -- at least no more so than any other RISC.

RISC-I and RISC-II had condition codes and register windows, like SPARC. RISC-V doesn't have either, like MIPS. The RISC-V assembly language is also very similar to MIPS.

RISC-II had both 16 and 32 bit opcodes (as did IBM 801, and Cray designs) and RISC-V has inherited this (but also following the great success of ARM Thumb2).

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