Earlier quoted context omitted.
I'm just blown away that Apple gets the credit for the Arm switch, but I'll take it.
Apple has been running ARM processors since the original iPhone.
The Ampere Altra Review: 2x 80 Cores Arm Server Performance Monster
151–160 of 266 posts
Re: The Ampere Altra Review: 2x 80 Cores Arm Server Performance Monster
#152This line is the kicker for me: "Intel’s current Xeon offering simply isn’t competitive in any way or form at this moment in time." The rest of the paragraph twists the knife more, and declares there to be an open market on server hardware for AMD and Ampere to fight it out. With application stacks being what they are and optimizations for Xeon so deeply integrated, it's unlikely that folks running private datacenter…
are there any good articles about what has gone so, so wrong at intel in the last few years?
This messed up their whole CPU development pipeline, because their designs are tightly bound to the process node, and it's a multi-year process. Because 10 nm hasn't ever worked in volume, and their new CPU designs are based around 10 nm, their latest server chips are still based on optimized Skylake microarchitecture, which was first released in 2015.
Early indications are that Intel's next process node (which they're calling 7nm) is also experiencing problems, if those problems aren't resolved, that probably means they'll have cpu designs for 7nm that they also can't ship in volume, in addition to the 10nm designs.
If they can figure out their fab issues, and they don't have a corporate implosion, I'm guessing they'll start making competitive CPUs again; they've been way behind before and come back (anti-competitive practices helped make sure they had the finances for that, of course).
Re: The Ampere Altra Review: 2x 80 Cores Arm Server Performance Monster
#153Earlier quoted context omitted.
Windows on arm64 systems aren't locked down. Meanwhile for arm64 Macs, they aren't either. Yesterday, https://twitter.com/xenokovah/status/1339914714055368704?s=2... was released to run unsigned kernels.
It's encouraging to see an effort like this, but unless it can become a first-class citizen on M1 hardware, it will be at best like trying to keep an iDevice jailbroken, or having a custom Android ROM that lacks important basic functionality like VoLTE. One can hope, I guess. If I could be sure I could run Linux without it being hobbled, and that Apple wouldn't pull the rug out from under me, I could actually see mys…
https://www.happyassassin.net/posts/2014/01/25/uefi-boot-how...
I find it funny that almost all the real gripes with user freedom infringement actually tend to come as a result of Microsoft or other big players getting their fingers into a hardware platform.
Re: The Ampere Altra Review: 2x 80 Cores Arm Server Performance Monster
#154Earlier quoted context omitted.
AMD should see the writing on the wall and start designing ARM CPUs. I think that would be very exciting because they have the engineering expertise and talent necessary to compete against Apple's M1. I don't know of any other company that can do that (besides Intel, but you know...). Additionally, there is a huge hole open right now for ARM on everything else that is not an Apple product. Apple normalized ARM on con…
AMD is doing fine. "The writing on the wall". Zen3 is going to very competitive, their interconnect on chip is great. Sure, add a line for ARM. What's interesting to me, I feel like a lot of this started when intel wouldn't do the chip for the iphone. All of a sudden you had this leading edge mfg pushing arm hard which drove volumes through the roof, and all the copycats (android etc) copied the chip selection, scree…
- Arm has dominated low power / mobile segment from well before the iPhone due to its superior power consumption;
- The non Arm IP (eg Imagination GPU) was also important and it was unlikely that Intel would have been integrated that on their SoCs.
I had an Atom tablet from the time when Intel supposedly had competitive mobile SoCs and it really wasn't a great device - ran hot and very short battery life.
Re: The Ampere Altra Review: 2x 80 Cores Arm Server Performance Monster
#155Earlier quoted context omitted.
I find that a bit surprising since my understanding is RISC-V is more minimal (has fewer higher level instructions) (ATM, that will change with extensions) then ARM. This paper refutes your point and is inline with my understanding: https://carrv.github.io/2020/papers/CARRV2020_paper_12_Perot... One counter point is the simpler the ISA the more work the compiler needs to do. So x86 is may be easier to write an optimi…
My understanding was that RV was less dense than the ARM-M Thumb variants, but more dense than AArch64 like these servers would be.
With compression and the multiply/divide extensions very similar to the ARM-M Thumb variants in code density.
https://riscv.org/announcements/2016/04/risc-v-offers-simple...
https://riscv.org/wp-content/uploads/2019/12/12.10-12.50a-Co...
Really fun time to be working on this part of the stack.
Re: The Ampere Altra Review: 2x 80 Cores Arm Server Performance Monster
#156Earlier quoted context omitted.
I bet there will be enough interest in keeping a top-tier fab facility and expertise on the US soil. If I were DoD, I would be very interested, for instance.
Probably connected: https://www.extremetech.com/electronics/317329-tsmc-will-ope... Not sure if it has to be absolutely top-tier for defense purposes though.
OTOH you'd rather be top-notch in your communication equipment, low-power sensors for reconnaissance, etc. In some areas, having a US-controlled 7 nm fab may matter even for DoD.
Re: The Ampere Altra Review: 2x 80 Cores Arm Server Performance Monster
#157Re: The Ampere Altra Review: 2x 80 Cores Arm Server Performance Monster
#158So how are the cores interconnected? As ARM server designs love to throw out tens to hundreds of cores which sounds good on paper, but are not really useful to lots of workloads as they have a shit interconnect or lots of NUMA nodes. Interconnect is key, e.g., see the improvements between zen2 and zen3, especially for the `4 An anecdote: I got some hands on a box with a Cavium ThunderX2 96 logical core processor abou…
ThunderX was a huge disappointment. ThunderX2 (which one may think is the successor of ThunderX, but is actually a completely different system that Cavium obtained by acquiring a different company that was also working on ARMv8 hardware) was a (not so huge) disappointment. Cavium tried to copy-paste lots of coprocessors and offload things from the CPU, but the overall system was not that great. Early AMD Softiron and…
I think you're getting ThunderX2 and ThunderX mixed up here.
Re: The Ampere Altra Review: 2x 80 Cores Arm Server Performance Monster
#159Earlier quoted context omitted.
AMD should see the writing on the wall and start designing ARM CPUs. I think that would be very exciting because they have the engineering expertise and talent necessary to compete against Apple's M1. I don't know of any other company that can do that (besides Intel, but you know...). Additionally, there is a huge hole open right now for ARM on everything else that is not an Apple product. Apple normalized ARM on con…
It's not totally clear to me if the M1 gains are from the 5nm process, which even AMD hasn't transitioned too yet while still smoking everything Intel on 7nm, from ARM itself, or from some mix of both. Of course, it's probably a mix, but I don't know if ARM alone has much in that mix. It does seem to me that, even if ARM held no performance benefit over x86, Apple would still decide to use it based on their use of it…
Re: The Ampere Altra Review: 2x 80 Cores Arm Server Performance Monster
#160Earlier quoted context omitted.
> I'd be curious to see AES encryption performance compared between the same CPUs from Ampere, Intel, and AMD. In my experience, Intel have a significant performance advantage with their AES-NI implementation over AMD. I wonder what Ampere's cores can do. AMD in Zen1 had 2x AES-pipelines, allowing 2x 128-bit AES operations per clocktick. Intel caught up later, and eventually also added 2x AES-pipelines of their own.…
I haven't been able to test any Zen 3 CPUs. Now I'm curious! From benchmarks listed here: https://calomel.org/aesni_ssl_performance.html it seems that Intel had similar performance in their 2015 release of the i7-6700 as AMD's 2017 release of Ryzen 7 1800X. Raw general purpose benchmarks I found via Google put the Ryzen 7 1800X at about twice the compute capability as an i7-6700, but their AES performance is quite ev…
GCM mode can be parallelized. Notice AES-128-GCM (which can take advantage of 2x pipelines) really flies on Zen1 compared to 6700.