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Google offers free fabbing for 130nm open-source chips

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Re: Google offers free fabbing for 130nm open-source chips

#251

Post by manquer »

yjftsjthsd-h wrote: post #179
awelkie wrote: post #67

Earlier quoted context omitted.

An open source WiFi chip would be super cool. I wonder how easy it would be to take the FPGA code from openwifi[0] and combine it with a radio on the same chip? [0] https://github.com/open-sdr/openwifi

Even if you could technically make it work, I'd be very nervous around the legalities of that. Or is the Wi-Fi spectrum so unregulated that you can run without any certification at all?

Certification has to do power of the signal and frequency. licensing is not required in some frequency bands like in 2.4 GHz used by WiFi.

Re: Google offers free fabbing for 130nm open-source chips

#252

Post by qaute »

blackrock wrote: post #118
qaute wrote: post #94

Earlier quoted context omitted.

> I always wondered why you needed gearing mechanisms in a micro machine. Has there ever been a practical application for gears in MEMS? IIRC, Sandia Lab's SUMMiT V process (the source of videos like [1]) was funded in part to make mechanical latches and fail-safes for nuclear weapons, but I'm not sure what's currently in use for obvious reasons. I don't think they found many other practical applications, though expe…

Fascinating, thanks for the info. Some ideas about this: (1) I wonder if you can make an unpickable lock with MEMS. Say, if you get a finger print scan, or retinal scan, then the device would need a positive confirmation in order to unlock itself. I have no idea how practical this is, but it sounds like some kind of Superman genetic authentication system, in order to unlock the information crystals. (2) The other thi…

> I wonder if you can make an unpickable lock with MEMS

I'm not sure what you mean. MEMS are generally tiny and I'm not sure why you'd need a ~1mm safe? But MEMS relay switches, which mechanically connect/disconnect circuits, exist.

> The other thing is, can the gears be used to store potential energy?

Springs and fluid reservoirs aren't very energy or power dense; good batteries and capacitors are much more effective and reliable. MEMS flywheels have been built and are potentially competitive, but are also extremely tricky to build.

> The key here might be if you can build a micro electric generator.

This is doable and an area of active research (for, say, charging low-power devices when a human walks, definitely not grid-scale power). Magnets are hard to work with in MEMS, so other techniques (piezoelectricity, triboelectricity) are used. [1] is currently badly-written but mentions most important bits.

[1] https://en.wikipedia.org/wiki/Nanogenerator

Re: Google offers free fabbing for 130nm open-source chips

#253

Post by foobiekr »

Taek wrote: post #151

I've spent some time in the chip industry. It is awful, backwards, and super far behind. I didn't appreciate the full power of open source until I saw an industry that operates without it. Want a linter for your project? That's going to be $50k. Also, it's an absolutely terrible linter by software standards. In software, linters combine the best ideas from thousands of engineers across dozens of companies building on…

The whole industry still operates like the 90s right down to license management and terrible tooling. It's one of the few multi-billion dollar industries that was mostly untouched in the dotcom, and is still very old-school today.

The problem is, it's also a very, very tough industry to disrupt. Not for lack of trying though.

Re: Google offers free fabbing for 130nm open-source chips

#254

Post by nostrademons »

BoysenberryPi wrote: post #208
ddevault wrote: post #180

Earlier quoted context omitted.

Making money only writing open source is possible, but complicated and out of scope for this comment. But writing some open source - making your tools (compilers, linters, runtimes), libraries, frameworks, monitoring, sysops/sysadmin tooling, and so on open source is much more profitable, and that's a huge subdomain of open source out there right now.

This doesn't really answer my question though. Seems like the other comment to my question is spot on. If you divide all company actions into making money or saving money then open sourcing your toolset is more of a saving money thing as you can get people who aren't on your payroll to contribute to them. That's all well and good but not exactly what I think of when someone says "making money with open source."

For a lot of corporate open-source the goal is to commoditize a complement of your revenue-generating product and hence generate more sales. If you're Elastic, having more companies running ElasticSearch increases the number of paying customers looking for hosted ElasticSearch. If you're RedHat or IBM, having more companies using Linux increases the number of companies looking for Linux support. If you're Google, having more phones running Android increases the number of devices you can show ads on.

Similarly for independent developers. You don't make money off the open-source software itself. You make money by getting your name out there as a competent developer, and then creating a bidding war between multiple employers who want to lock up the finite supply of your labor. The delta in your compensation from having multiple competitive offers can be more than some people's entire salary.

Re: Google offers free fabbing for 130nm open-source chips

#255

Post by rcxdude »

neltnerb wrote: post #250
radicaldreamer wrote: post #226

Earlier quoted context omitted.

And the cost for failure is a lot, lot higher... it’s a different model of development because there are many different challenges involved.

Why is it so high if the fab is free? Intrinsic cost of development time and tooling?

Time especially (though costs are also high). Even with infinite budget you still have a cycle time of months between tape-out and silicon in hand.

Re: Google offers free fabbing for 130nm open-source chips

#256

Post by cmrdporcupine »

rwmj wrote: post #159
DCKing wrote: post #96

Earlier quoted context omitted.

The Apollo project here would be particularly suitable as they have already iterated on the design using FPGAs. The chip is already working as an FPGA and bringing tangible improvements: I'm assuming a 130nm ASIC version would be even better.

I'm not sure that assumption is necessarily right. As a general guide, on a cheap (sub $200) modern FPGA I can clock an RV64 core at 50-100 MHz. As you spend more on the FPGA, you can get higher clock rates and/or more cores. Also it should be possible to clock 32 bit cores higher (perhaps much higher) because there will be fewer data paths for internal routing to skew. On the other hand, modern RISC architectures ar…

I had no problem running PicoRV32 at 50mhz (maybe higher... 75mhz? can't recall, at that point I had other issues that might not have been CPU related) on an Artix 7 35t.

Honestly instead of chasing after new 68k silicon it'd be better to just emulate on a modern processor. Not the same romance, I know....but

Re: Google offers free fabbing for 130nm open-source chips

#257

Post by cmrdporcupine »

I have a friend who has a Verilog clone of the C64 VIC-II chip, which he has interfaced into a real C64 and it's running pretty much everything, demos, etc. even supports weird things like the lightpen.

I wonder if his project would fit the bill here... real VIC-II chips are dying all over the place and getting hard to find... manufactured ASICs to replace them could be a popular item....

Re: Google offers free fabbing for 130nm open-source chips

#258

Post by wrycoder »

kickopotomus wrote: post #225
Taek wrote: post #151

I've spent some time in the chip industry. It is awful, backwards, and super far behind. I didn't appreciate the full power of open source until I saw an industry that operates without it. Want a linter for your project? That's going to be $50k. Also, it's an absolutely terrible linter by software standards. In software, linters combine the best ideas from thousands of engineers across dozens of companies building on…

I think the underlying issue here is that IC design is one or two orders of magnitude more complex than software. In my experience, the bar for entry into actual IC design is generally a masters or PhD in electrical engineering. There is a lot that goes into the design of an IC. Everything from the design itself to simulation, emulation, and validation. Then, depending on just how complex your IC is, you have to also…

That might be true for analog/mixed signal design, but not for CMOS. The design rules are built into the CAD. The design itself is a immense network of switches.

Not having an advanced degree doesn’t mean you can’t master complexity. It’s the same as with software.

Re: Google offers free fabbing for 130nm open-source chips

#259

Post by phendrenad2 »

This is cool! But I fear the workflow to get a chip out the door requires a lot of niche specialized knowledge. Making a logic design work on an FPGA is much easier, because the chip overhead (stuff like I/O pins) is all handled for you. If I had to design my own I/O pins at the silicon level, I wouldn't know where to start. And having access to open-source tools that give me the ABILITY to build a chip doesn't help with the knowledge I'm missing.

I think, however, that this may help Google integrate into academia. I can imagine a lot of MSEE and PhD students are looking at this hungrily.

Re: Google offers free fabbing for 130nm open-source chips

#260

Post by ascorbic »

dekhn wrote: post #150
navanchauhan wrote: post #33

Earlier quoted context omitted.

I was thinking about AutoDock Vina ( Molecular Docking Software ), I have literally 0 knowledege about hardware :( Then again, this is going to be a really fun experience

Yes, you can build dedicated ASICs. No, it's not worth it for docking software.

According to Wikipedia there has been some success building FPGAs for Autodock, so maybe it could be. https://en.m.wikipedia.org/wiki/AutoDock
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