- 130 nm process built with Skywater foundry - Skywater Platform Development Kit (PDK) is currently digital-only - 40 projects will be selected for fabrication - 10 mm^2 area available per-project - Will use a standard harness with a RISC-V core and RAM - Each project will get back ~100 ICs - All projects must be open source via Git - Verilog and gate-level layout
I'm curious to see how aggresive designs get with analog components, given that they can be laid out in the GDS, but the PDK doesn't support it yet.