81–90 of 119 posts
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IEEE tracks a vast number of open standards and specifications (e.g., Ethernet, WiFi, Bluetooth). I guess the comment was pointing out that there is a degree of openness in EE.
> IEEE tracks a vast number of open standards And demands mega-bucks for a PDF of any of those standards
> FPGAs are a programmable platform, but one designed by EEs for EEs rather than for programmers. This is the problem with FPGAs. Their performance and utility is not really disputed. Working with them is so un-ergonomic that it's frankly embarrassing. The EE world is notoriously closed/proprietary making it incredibly difficult to explore novelty or customize tooling to suit specific needs. The situation is reminisc…
I too decry the lack of openness with respect to the data file encoding which would allow for more open source tools to be created. I had a hilarious discussion with Xilinx's VP of tools about this[1]. The interesting thing about HDLs and HDL work flows is that they can "look" like software and yet not be software. VHDL and Verilog are the only "languages" I know where you can write something that is both syntactical…
Also HDLs are not alone in having 'quirks' that experienced engineers need to know about.. c/c++ for example. cough undefined behaviour cough
Code coverage and quality checking tools are quite good in the EE world, verification has some powerful tools to almost eliminate hardware bugs - which is especially important for asic design.
On the open sourcing of tools - there are free ones, that target real FPGAs - so can you say why these have not surpassed vivado? In fact, while impressive in their own right, they are very primitive in comparison to vivado despite being open source for years. The open source verilog tools also don't fully support all of verilog 2008/2012.
So I don't buy the open sourcing argument for the synthesis and pnr tools would dramatically affect FPGA sales. Instead higher level compilation and abstraction may be the key.
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What does leaving the sandbox mean when implementing an FPGA? I'm not aware of any soft resource one can't completely control in Vivado/Xilinx as every hard resource can be completely described in your own design via the primitive library. That doesn't mean it is always a good idea, but one can do it.
> described in your own design via the primitive library There's your sandbox EDIT: If you cannot replace their tools with yours, it is a sandbox.
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> Xilinx tools are free, as in beer This is untrue. [1] > Supporting code is a huge overhead and it's not clear, to me anyway, what Xilinx gains from the expendature. In what world is this the case? You host the project on github or the like and let people contribute bug fixes at the cost of filtering pull requests. Letting the community contribute bug fixes is a huge reason companies open source their tools. [1]: ht…
From your link: Vivado HL WebPACK™ Edition: no-cost, device-limited version of the Vivado HL Design Edition It's not as simple as an upload to github. https://opensource.com/business/16/5/how-transition-product-...
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One exception, the ICE range from Lattice which have a open source tool-chain https://en.wikipedia.org/wiki/ICE_(FPGA)
AFAIK that tool-chain is thanks to the reverse engineering efforts of an individual and not Lattice itself. It's a step towards the right direction, but not really a first class vendor supported tool.
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I too decry the lack of openness with respect to the data file encoding which would allow for more open source tools to be created. I had a hilarious discussion with Xilinx's VP of tools about this[1]. The interesting thing about HDLs and HDL work flows is that they can "look" like software and yet not be software. VHDL and Verilog are the only "languages" I know where you can write something that is both syntactical…
The arguement in [1] doesn't make sense to me. Xilinx tools are free, as in beer, and the sale of ICs funds those tools so they are implementing your system of a "tax on every chip". Surely the VP of tools at Xilinx knows this. What problem are you unable to solve with an FPGA because you do not have the source code to Vivado? I understand why Xilinx doesn't want to release their source. They don't want to support it…
If they did just that, then the source code would "appear" as people wrote back ends for the various open source HDLs that are already in existence.
The challenge that I see is that Xilinx has already had the experience of selling that data to vendors like Synopsis who sell their own synthesis tools and charge major money for them. And like a person who holds an unvested stock option for a stock that goes from price A above the strike price, to a price B that is below the strike price, they feel as if they "lost" money. Similarly, Xilinx can't see "giving up" thousands, if not millions of licensing dollars they are getting from tools vendors, just to enable an open source community to start. Because they fundamentally can't see that having a vibrant open source ecosystem benefits all players. And this in spite of the gcc example which is pretty incontrovertible in my opinion.
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The arguement in [1] doesn't make sense to me. Xilinx tools are free, as in beer, and the sale of ICs funds those tools so they are implementing your system of a "tax on every chip". Surely the VP of tools at Xilinx knows this. What problem are you unable to solve with an FPGA because you do not have the source code to Vivado? I understand why Xilinx doesn't want to release their source. They don't want to support it…
My argument for the VP was essentially not to release their source, rather to release all of the details that you need to create, sign, and then load a bitmap file into their FPGAs. Also to document how the chip is laid out, and how you can floorplan it by hints in the .bit file. If they did just that, then the source code would "appear" as people wrote back ends for the various open source HDLs that are already in e…
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And to be fair, since then FPGAs have exploded in non ASIC prototyping use cases. They're even starting to be used for some consumer electronics.
I'm interested in seeing some examples of their use in consumer electronics. I think this article would be a lot more compelling if it had a section on "You've already bought one if you have a (hypothetically) Roomba vaccum/ Tesla Model S/ Thinkpad laptop/ Ubiquiti router." I'm pretty sure most of those don't have FPGAs, but would be curious to see a list of things which do. I am by no means a representative consumer…
This article makes me wonder if adding FPGA units to existing CPUs and GPUs that integrate with existing silicon makes a lot more sense than having a completely separate FPGA.
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> IEEE tracks a vast number of open standards And demands mega-bucks for a PDF of any of those standards
So how do you propose a non-profit like the IEEE make money?