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How FPGAs work, and why people will buy them (2013)

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Re: How FPGAs work, and why people will buy them (2013)

#11
post #9
post #5

> FPGAs are a programmable platform, but one designed by EEs for EEs rather than for programmers. This is the problem with FPGAs. Their performance and utility is not really disputed. Working with them is so un-ergonomic that it's frankly embarrassing. The EE world is notoriously closed/proprietary making it incredibly difficult to explore novelty or customize tooling to suit specific needs. The situation is reminisc…

From what I understand, chips are now laid out by an optimizer instead of by humans. The humans design an adder, but the software picks where to place it and how to arrange the gates. I took a couple undergrad classes in CE, which makes me dangerous, but can we be that far away from building a macro system to convert small bits of imperative code into FPGA logic?

Naively translating imperative code to run on FPGAs won't do much in the general case. It takes time to get data to and from the FPGA so whatever you're doing on the FPGA has to be time consuming enough to make up for the time spent shuffling data around. FPGAs tend to excel at things that are highly parallel (e.g. routing) or streaming applications (e.g. audio/video codecs), so most applications don't have obvious ways to benefit from an FPGA.

Re: How FPGAs work, and why people will buy them (2013)

#12
post #7
post #5

> FPGAs are a programmable platform, but one designed by EEs for EEs rather than for programmers. This is the problem with FPGAs. Their performance and utility is not really disputed. Working with them is so un-ergonomic that it's frankly embarrassing. The EE world is notoriously closed/proprietary making it incredibly difficult to explore novelty or customize tooling to suit specific needs. The situation is reminisc…

> The EE world is notoriously closed/proprietary See the IEEE.

Can you elaborate?

Re: How FPGAs work, and why people will buy them (2013)

#13
post #9

Earlier quoted context omitted.

From what I understand, chips are now laid out by an optimizer instead of by humans. The humans design an adder, but the software picks where to place it and how to arrange the gates. I took a couple undergrad classes in CE, which makes me dangerous, but can we be that far away from building a macro system to convert small bits of imperative code into FPGA logic?

Naively translating imperative code to run on FPGAs won't do much in the general case. It takes time to get data to and from the FPGA so whatever you're doing on the FPGA has to be time consuming enough to make up for the time spent shuffling data around. FPGAs tend to excel at things that are highly parallel (e.g. routing) or streaming applications (e.g. audio/video codecs), so most applications don't have obvious w…

I'd also throw in "things that have precise timing considerations" to the list. Like driving an LED display, etc.

Re: How FPGAs work, and why people will buy them (2013)

#14
post #10
post #5

> FPGAs are a programmable platform, but one designed by EEs for EEs rather than for programmers. This is the problem with FPGAs. Their performance and utility is not really disputed. Working with them is so un-ergonomic that it's frankly embarrassing. The EE world is notoriously closed/proprietary making it incredibly difficult to explore novelty or customize tooling to suit specific needs. The situation is reminisc…

Actually I recently bought a Spartan 7 based FPGA board after taking the nand2tetris course and started playing with the free version of the Vivado suite. If your complaint is principle based on the stuff being non free software, then it holds. If it's on usability - not sure it does. While lengthy, the process of compiling and getting something running on silicon didn't seem any more complicated than Grade/Maven etc…

> While lengthy, the process of compiling and getting something running on silicon didn't seem any more complicated than Grade/Maven etc all based Android Studio builds.

I'm not sure many people would share your opinion that Gradle/Maven are uncomplicated.

Personally, I would say they belong to the 20% most complicated build toolchains I have encountered - which would make the FPGA process still not very uncomplicated in comparison.

Re: How FPGAs work, and why people will buy them (2013)

#15
post #10
post #5

> FPGAs are a programmable platform, but one designed by EEs for EEs rather than for programmers. This is the problem with FPGAs. Their performance and utility is not really disputed. Working with them is so un-ergonomic that it's frankly embarrassing. The EE world is notoriously closed/proprietary making it incredibly difficult to explore novelty or customize tooling to suit specific needs. The situation is reminisc…

Actually I recently bought a Spartan 7 based FPGA board after taking the nand2tetris course and started playing with the free version of the Vivado suite. If your complaint is principle based on the stuff being non free software, then it holds. If it's on usability - not sure it does. While lengthy, the process of compiling and getting something running on silicon didn't seem any more complicated than Grade/Maven etc…

Gradle and maven aren’t the posterchild for easy development setups- I would instead look at a successful dynamic language like python, php, or the web with JavaScript.

That being said, I’m also not sure the issue is entirely developer ergonomics. Personally I think the fact that the hardware is something you have to go out and buy versus just coming stock in your computer is more of a factor in developer onboarding, and the resulting mindshare.

Re: How FPGAs work, and why people will buy them (2013)

#16
post #3
post #2

Nice article, but it's from 2013.

And to be fair, since then FPGAs have exploded in non ASIC prototyping use cases. They're even starting to be used for some consumer electronics.

FPGAs have been used in the industry for decades, basically every time you need high throughput and/or very low latencies and you don't have the volume to justify making an ASIC then FPGAs and CPLDs are the way to go.

The article is not really talking about that though, it's more about having FPGAs in mainstream desktop computers. This is still far from a reality, even if Intel seems to be pushing for it.

Re: How FPGAs work, and why people will buy them (2013)

#17
post #7

Earlier quoted context omitted.

> The EE world is notoriously closed/proprietary See the IEEE.

Can you elaborate?

IEEE tracks a vast number of open standards and specifications (e.g., Ethernet, WiFi, Bluetooth). I guess the comment was pointing out that there is a degree of openness in EE.

Re: How FPGAs work, and why people will buy them (2013)

#19
post #5

> FPGAs are a programmable platform, but one designed by EEs for EEs rather than for programmers. This is the problem with FPGAs. Their performance and utility is not really disputed. Working with them is so un-ergonomic that it's frankly embarrassing. The EE world is notoriously closed/proprietary making it incredibly difficult to explore novelty or customize tooling to suit specific needs. The situation is reminisc…

The hard part AFAICT, is the modeling of the chip for timing analysis. Whereas all of the timing information is explicitly defined for programmers on CPUs, that timing information (and the models of how FPGAs are binned) is extremely proprietary for FPGA vendors, to the point of being treated as a trade secret. Since they use custom cell layouts, I've heard that they consider the timing information core to their IP. If another vendor got them, the could conceivably see what interesting points are optimized past a foundary's standard cells because of the tighter timing guarantees than they might should have.

Now, I'm personally of the opinion that their competitors have taken their chips into one of those nifty 3d xrays and know the exact layout of the cells anyway, but it's hard to push that idea.

Re: How FPGAs work, and why people will buy them (2013)

#20
post #10
post #5

> FPGAs are a programmable platform, but one designed by EEs for EEs rather than for programmers. This is the problem with FPGAs. Their performance and utility is not really disputed. Working with them is so un-ergonomic that it's frankly embarrassing. The EE world is notoriously closed/proprietary making it incredibly difficult to explore novelty or customize tooling to suit specific needs. The situation is reminisc…

Actually I recently bought a Spartan 7 based FPGA board after taking the nand2tetris course and started playing with the free version of the Vivado suite. If your complaint is principle based on the stuff being non free software, then it holds. If it's on usability - not sure it does. While lengthy, the process of compiling and getting something running on silicon didn't seem any more complicated than Grade/Maven etc…

For basic implementations in ways intended by the vendor, I'm sure the supplied tools are fine. When you want to leave the sandbox and do interesting things, it's hard. I was thinking along the lines of writing your own tools that would require information about timings and chip resources/layouts.

EDIT: your cpu ISA is open, but fpga layout/bit-stream is not--locking you to your vendor's innovation and ideas for how things should be done.

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