reddit has some benchmarks (rumored): http://i.imgur.com/9bXzF5B.png https://videocardz.com/65913/how-fast-is-ryzen
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Intel Shows 2.5D FPGA at ISSCC
21–30 of 126 posts
Re: Intel Shows 2.5D FPGA at ISSCC
#22reddit has some benchmarks (rumored): http://i.imgur.com/9bXzF5B.png https://videocardz.com/65913/how-fast-is-ryzen
Why do both of these feature only the physics benchmark? The second link illustrates that Intel still wins in single core performance.
Re: Intel Shows 2.5D FPGA at ISSCC
#23So the latest AMD cores seem like they might be more competitive... does anyone know which AMD processors are likely to support ECC memory? My one big gripe with Intel CPUs is that they currently only support ECC memory for non-consumer chips. I run a personal ZFS cluster and am more concerned about data integrity / cost than I am about pure CPU performance.
I think that most AMD processors support ECC.
Re: Intel Shows 2.5D FPGA at ISSCC
#24So the latest AMD cores seem like they might be more competitive... does anyone know which AMD processors are likely to support ECC memory? My one big gripe with Intel CPUs is that they currently only support ECC memory for non-consumer chips. I run a personal ZFS cluster and am more concerned about data integrity / cost than I am about pure CPU performance.
I am re-building my ZFS array with consumer parts.
GIGABYTE GA-X150M-PRO ECC Kingston 16GB ECC DIMM KVR21E15D8/16 Pentium G4600 CPU
Toys arrive in a couple of days. Total outlay was $220.
When I first built my storage box, in 2009, the AMD CPUs all supported ECC DRAM, but I could not find a motherboard-chipset-BIOS setup that would actually implement it.
Re: Intel Shows 2.5D FPGA at ISSCC
#25And consumes twice less WATs!
Re: Intel Shows 2.5D FPGA at ISSCC
#26There's a lot that goes into CPU performance. Go to http://wccftech.com/ryzen-smaller-die-intel-zen-architecture... and search for "Table courtesy of the Linley Group" without quotes to see an extremely interesting table: http://cdn.wccftech.com/wp-content/uploads/2017/02/Zen-Doubl... > Intel has a double precision IPC of 16 FLOPs per Clock with Skylake as well as 2x 256 bit FMA whereas Zen only has 8 FLOPs per clock…
Differ t workloads will be if it in different ways from the trade offs. I do t imagine many applications will miss AVX 512.
Skylake doesn't have AVX512. Still those two 256 bit ALUs do take a lot of space an at least partially explain the size difference.
Re: Intel Shows 2.5D FPGA at ISSCC
#27Earlier quoted context omitted.
It's actually quite difficult to use AVX512 and have it pay off significantly unless you design something to specifically take advantage of it.
Exactly. IMO doing GPGPU is actually easier than porting code to use vectorisation, since GPU cores are quite a bit more capable (allow branching/context switches, just with a performance penalty) than the CPUs vector units (vector code AFAIK completely breaks if you try to do an early return on one unit). I'm waiting for the day when the CPU designers learn from GPU and just give us full OpenMP kernel support, such…
Have you looked into Xeon Phi? They have up to 288 threads. With a 256 thread Xeon we got good speed ups using up to 128 threads with Folding@home's latest GROMACS core (0xa7). With higher thread counts it failed to improve. In the long-run massively parallel CPUs could outpace GPUs precisely because of their flexibility.
Note that the 0xa7 core also uses 256 AVX. That's multiple CPU threads and vector instructions.
Re: Intel Shows 2.5D FPGA at ISSCC
#28Earlier quoted context omitted.
Exactly. IMO doing GPGPU is actually easier than porting code to use vectorisation, since GPU cores are quite a bit more capable (allow branching/context switches, just with a performance penalty) than the CPUs vector units (vector code AFAIK completely breaks if you try to do an early return on one unit). I'm waiting for the day when the CPU designers learn from GPU and just give us full OpenMP kernel support, such…
Have you looked into Xeon Phi? They have up to 288 threads. With a 256 thread Xeon we got good speed ups using up to 128 threads with Folding@home's latest GROMACS core (0xa7). With higher thread counts it failed to improve. In the long-run massively parallel CPUs could outpace GPUs precisely because of their flexibility. Note that the 0xa7 core also uses 256 AVX. That's multiple CPU threads and vector instructions.
I haven't tried MICs personally, but AFAIK you need vectorization to match current Pascal generation GPU performance with Knight's landing -> which is where my comment applies. I don't doubt that you can get good speedups when this applies to your code already, but if you start from naive CPU code you'll have a lot of work to do, which IMO is similar to the work needed to port to GPGPU.
Re: Intel Shows 2.5D FPGA at ISSCC
#29So the latest AMD cores seem like they might be more competitive... does anyone know which AMD processors are likely to support ECC memory? My one big gripe with Intel CPUs is that they currently only support ECC memory for non-consumer chips. I run a personal ZFS cluster and am more concerned about data integrity / cost than I am about pure CPU performance.
I am re-building my ZFS array with consumer parts. GIGABYTE GA-X150M-PRO ECC Kingston 16GB ECC DIMM KVR21E15D8/16 Pentium G4600 CPU Toys arrive in a couple of days. Total outlay was $220. When I first built my storage box, in 2009, the AMD CPUs all supported ECC DRAM, but I could not find a motherboard-chipset-BIOS setup that would actually implement it.
I think that's why so many people go with the older HP microservers. Super cheap, nice form factor, just add ECC RAM and HDDs.
Re: Intel Shows 2.5D FPGA at ISSCC
#30So the latest AMD cores seem like they might be more competitive... does anyone know which AMD processors are likely to support ECC memory? My one big gripe with Intel CPUs is that they currently only support ECC memory for non-consumer chips. I run a personal ZFS cluster and am more concerned about data integrity / cost than I am about pure CPU performance.
Intel does actually support ECC memory in some of their low end consumer chips: https://ark.intel.com/search/advanced?s=t&MarketSegment=DT&E...