Intel Shows 2.5D FPGA at ISSCC
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Intel Shows 2.5D FPGA at ISSCC
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Re: Intel Shows 2.5D FPGA at ISSCC
#2edit: oh, derp. nevermind. there's a second page: http://www.eetimes.com/document.asp?doc_id=1331317&page_numb...
edit edit: so apparently page 2 can't be linked to. whatever. bottom of the article content has a "next page" link.
Re: Intel Shows 2.5D FPGA at ISSCC
#3Relevant quote:
"AMD said its upcoming Zen x86 core fits into a 10 percent smaller die area than Intel’s currently shipping second-generation 14nm processor. Analysts and even Intel engineers in the session said the Zen core is clearly competitive though many confidential variables will determine whether the die advantage translates into lower cost for AMD."
Re: Intel Shows 2.5D FPGA at ISSCC
#4Re: Intel Shows 2.5D FPGA at ISSCC
#5Re: Intel Shows 2.5D FPGA at ISSCC
#6> Intel has a double precision IPC of 16 FLOPs per Clock with Skylake as well as 2x 256 bit FMA whereas Zen only has 8 FLOPs per clock and 2* 128 bit FMA.
FMA=Fused multiply-add. It remains to be seen whether dollar for dollar AMD matches Intel or not -- it's likely to be very application dependent.
Re: Intel Shows 2.5D FPGA at ISSCC
#7Link points at something else. Even the edited link below..
Re: Intel Shows 2.5D FPGA at ISSCC
#8AMD really needs to start competing on price. Match Intel and Nvidia performance, at 75% TCO.
Re: Intel Shows 2.5D FPGA at ISSCC
#9AMD really needs to start competing on price. Match Intel and Nvidia performance, at 75% TCO.
http://hothardware.com/news/amds-ryzen-7-1700x-delivers-i7-6...
Re: Intel Shows 2.5D FPGA at ISSCC
#10AMD really needs to start competing on price. Match Intel and Nvidia performance, at 75% TCO.
That plus your point about TCO could be a nice way of competing with Intel.