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Google offers free fabbing for 130nm open-source chips

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Re: Google offers free fabbing for 130nm open-source chips

#271

Post by Ericson2314 »

kickopotomus wrote: post #225
Taek wrote: post #151

I've spent some time in the chip industry. It is awful, backwards, and super far behind. I didn't appreciate the full power of open source until I saw an industry that operates without it. Want a linter for your project? That's going to be $50k. Also, it's an absolutely terrible linter by software standards. In software, linters combine the best ideas from thousands of engineers across dozens of companies building on…

I think the underlying issue here is that IC design is one or two orders of magnitude more complex than software. In my experience, the bar for entry into actual IC design is generally a masters or PhD in electrical engineering. There is a lot that goes into the design of an IC. Everything from the design itself to simulation, emulation, and validation. Then, depending on just how complex your IC is, you have to also…

Nope this is just not true.

You can crank out correct HDL all day with https://clash-lang.org/, and the layout etc. work that takes that into "real hardware" while not trivial, are less creative optimization problems.

This is a post-hoc rationalization behind the decrepitness of the (esp Western[1]) hardware industry, and the rampant credentialism that arises when the growth of the moribund rent-seekers doesn't create enough new jobs.

[1]: Go to Shenzhen and the old IP theft and FOSS tradition has merged in a funny hybrid that's a lot more agile and interesting than whatever the US companies are up to.

Re: Google offers free fabbing for 130nm open-source chips

#272

Post by Ericson2314 »

chii wrote: post #163
Taek wrote: post #151

I've spent some time in the chip industry. It is awful, backwards, and super far behind. I didn't appreciate the full power of open source until I saw an industry that operates without it. Want a linter for your project? That's going to be $50k. Also, it's an absolutely terrible linter by software standards. In software, linters combine the best ideas from thousands of engineers across dozens of companies building on…

> Want a linter for your project? That's going to be $50k. the thing is that i think the open source software is a miracle that it even exists, and i don't find it strange that nowhere else has replicated the success. Because open source, at heart, is quite altruistic.

"Miracle" as in tireless efforts of the GNU project decades ago, not random act of the cosmic rays, let's be clear.

Re: Google offers free fabbing for 130nm open-source chips

#273

Post by d_tr »

I believe that a lot of people here might be interested in "Minimal Fab", developed by a consortium of Japanese entities.

These are kiosk-sized machines that a company can use to set up a fab with a few million dollars. Any individual can then design a chip and have it fabricated very (as in "I want to make a chip for fun") affordably.

I was not able to find a ton of information on this, but the 190nm process was supposedly ready last year and there were plans to go below this. The wafers are 12mm in diameter (so basically, one wafer -> one chip) and the clean room is just a small chamber inside the photolithography machine. There are also no masks involved, just direct "drawing".

Re: Google offers free fabbing for 130nm open-source chips

#274

Post by rcxdude »

neltnerb wrote: post #270
rcxdude wrote: post #255

Earlier quoted context omitted.

Time especially (though costs are also high). Even with infinite budget you still have a cycle time of months between tape-out and silicon in hand.

Ah, you're talking about this as a current-day commercial project. Carry on :-) I'm a professional PCB designer among other things. Most of what I have learned came from hard-won experience designing PCBs for projects done for myself and my own education even though a custom PCB was hardly cost effective in a commercial sense. They were just much cheaper since my time was free. They weren't useless projects in that w…

Yeah, it's a lot more like PCB design, just more extreme in cost and time (especially when looking at debugging and rework). I don't think it's particularly more intrinsically difficult for digital circuits, but it's a lot different from the rapid iteration cycles you have from software (which is the main point). Because of the timescales even for hobbyist stuff you want to invest a lot more in verification of your design before you actually build it. Also the amount of resources available for it is dire, even for FPGAs a hobbyist has a much harder time finding useful information compared to software.

Re: Google offers free fabbing for 130nm open-source chips

#275

Post by derefr »

So, until now, there's been this niche for FPGAs, where people would buy them in decent numbers to use with static programming, in production devices, simply because they needed some custom DSP or some-such, but the capital costs of an ASIC fab-run would be a killer for their project.

Has this announcement thrown that use-case for FPGAs out the window?

Re: Google offers free fabbing for 130nm open-source chips

#276

Post by georgeburdell »

kickopotomus wrote: post #225
Taek wrote: post #151

I've spent some time in the chip industry. It is awful, backwards, and super far behind. I didn't appreciate the full power of open source until I saw an industry that operates without it. Want a linter for your project? That's going to be $50k. Also, it's an absolutely terrible linter by software standards. In software, linters combine the best ideas from thousands of engineers across dozens of companies building on…

I think the underlying issue here is that IC design is one or two orders of magnitude more complex than software. In my experience, the bar for entry into actual IC design is generally a masters or PhD in electrical engineering. There is a lot that goes into the design of an IC. Everything from the design itself to simulation, emulation, and validation. Then, depending on just how complex your IC is, you have to also…

IC design does not need a masters or PhD, that's just what companies want to hire. The old school guys do not have these accreditations and somehow they're still doing fine.

-Engineering PhD

Re: Google offers free fabbing for 130nm open-source chips

#277

Post by riking »

phendrenad2 wrote: post #259

This is cool! But I fear the workflow to get a chip out the door requires a lot of niche specialized knowledge. Making a logic design work on an FPGA is much easier, because the chip overhead (stuff like I/O pins) is all handled for you. If I had to design my own I/O pins at the silicon level, I wouldn't know where to start. And having access to open-source tools that give me the ABILITY to build a chip doesn't help…

The project comes with a standard harness around your 10mm^2 design, with provided I/O and a working RISC-V supervisor CPU.

Re: Google offers free fabbing for 130nm open-source chips

#278

Post by gentleman11 »

Taek wrote: post #151

I've spent some time in the chip industry. It is awful, backwards, and super far behind. I didn't appreciate the full power of open source until I saw an industry that operates without it. Want a linter for your project? That's going to be $50k. Also, it's an absolutely terrible linter by software standards. In software, linters combine the best ideas from thousands of engineers across dozens of companies building on…

I am finding game development to be a tiny bit like this also: very little open source, lots of home-made clunky code, lots of NDAs and secrets. Generally, a much worse developer experience with worse tooling overall. To play devils advocate, it this makes game dev harder, which isn’t entirely bad because there is already a massive number of games being made that can’t sell, so it reduces competition a tiny bit. Also, it’s nice to know you can write a plugin and actually sell it. Still, it’s weird. The community in unreal can even be a bit unfriendly or hostile and they will sometimes mock you if you say you are trying to use Linux. Then again, unity’s community is unbelievably helpful

Re: Google offers free fabbing for 130nm open-source chips

#279

Post by kickopotomus »

wrycoder wrote: post #258
kickopotomus wrote: post #225

Earlier quoted context omitted.

I think the underlying issue here is that IC design is one or two orders of magnitude more complex than software. In my experience, the bar for entry into actual IC design is generally a masters or PhD in electrical engineering. There is a lot that goes into the design of an IC. Everything from the design itself to simulation, emulation, and validation. Then, depending on just how complex your IC is, you have to also…

That might be true for analog/mixed signal design, but not for CMOS. The design rules are built into the CAD. The design itself is a immense network of switches. Not having an advanced degree doesn’t mean you can’t master complexity. It’s the same as with software.

Same issues apply to digital ICs as well. The design is much more than just the rules encoded into the logic. What size node are you targeting? Is there an integrated clock? What frequency? What I/O does the IC have? What are the electrical and thermal specifications for the IC? Does it need to be low Iq? What about the pinout? What package? How do you want to structure the die? There are a lot of factors involved with determining the answers to these questions and they are highly interdependent.

The advanced degree is not meant to teach you how to grok complexity. It's to teach you what problems you can expect to encounter and how to go about solving them.

Re: Google offers free fabbing for 130nm open-source chips

#280

Post by patwillson22 »

My advice to anyone who's looking for a pathway into open source silicon is to look into E-Beam lithography. Effectively E-Beam lithography involves using a scanning electron microscope to expose a resist on silicon. This process is normally considered to slow for industrial production but it's simplicity and size make it ideal for prototyping and photo mask production.

The simplistic explanation for why this works is that electron beams can be easily focused using magnetic lenses into a beam that reaches the nano meter level.

These beams can then be deflected and controlled electronically which is what makes it possible to effectively make a cpu from a cad file.

Furthermore, It's very easy to see how the complexity of photolithography goes up exponentially as we scale down.

Therefore I believe it makes sense to abandon the concept of photolithography entirely if we want open souce silicon. I believe that this approach offers something similar to the sort of economics that enable 3D printers to become localized centers of automated manufacturing.

I should also mention that commercial E-beam machines are pretty expensive (something like 1-Mil) but that I dont think it would be that difficult to engineer one for a mere fraction of that price.

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