Google offers free fabbing for 130nm open-source chips

Post by orbifold » Tue, Jul 07, 2020, 10:30 AM UTC

MayeulC wrote: post #64

stephen_g wrote: post #16

Earlier quoted context omitted.

The efabless people that the talk mentions a bunch of times are using a fully open-source design flow but I think it's a bit hacky (as in, a bunch of command line tools from various open source projects, some of which may be unmaintained judging by the commit logs). They seem to have successfully fabricated a RISC-V based SoC with it though, which is crazy cool. As somebody with a decent amount of FPGA experience, ha…

IIRC there are a couple ways to produce the intended design. At the end of the day, fabs often take layouts in the GDSII format, which is documented and open. The Klayout open source visualizer is industry-standard in my experience. Now, how do you generate these layouts? It depends on what you are doing. If more on the experimental side of things, writing scripts to generate structures is fine, as long as these conf…

Post by pantalaimon » Tue, Jul 07, 2020, 10:41 AM UTC

mhh__ wrote: post #41

est31 wrote: post #6

This is amazing. I think the main reason why open source has taken off is because access to a computer is available to many people, and as cost is negligible, it only required free time and enough dedication + skill to be successful. For hardware though, each compile/edit/run cycle costs money, software often has 5-digit per seat licenses, and thus the number of people with enough resources to pursue this as a hobby…

Not only is the software expensive it's often crap. By which I don't mean, oh no it doesn't look nice - crap as in productivity-harming. For example, Altium Designer is probably the most modern (not most powerful although close) PCB suite and yet despite costing thousands a seat it is a slow, clunky, single-threaded (in 2020) program (somehow uses 20% of a 7700k at 4.6GHz with an empty design). Discord also thinks th…

Post by madushan1000 » Tue, Jul 07, 2020, 10:46 AM UTC

xvilka wrote: post #95

I should note there's open source ASIC toolchain - OpenROAD[1][2]. I wonder if these can be integrated. You also can use SymbiFlow to run your prototype in FPGA[3][4]. [1] https://theopenroadproject.org/ [2] https://github.com/The-OpenROAD-Project/OpenROAD [3] https://symbiflow.github.io/ [4] https://github.com/SymbiFlow

Post by DCKing » Tue, Jul 07, 2020, 10:53 AM UTC

phire wrote: post #107

DCKing wrote: post #31

From a hobbyist and preservation perspective, it would be cool if this could be used to produce some form of the Apollo 68080 core to revive the 68k architecture a little bit, and build out the Debian m68k port [0][1]. The last "big" 68k chips were produced in 1995 (that would be a 350nm process?) so this could be hugely improved on 130nm. The 68080 core is currently implemented in FPGAs only and is already the faste…

You would have problems with licensing the 68k ISA. I believe freescale currently owns the architecture, and still manufactures some 68k microcontroller cores.

Post by madushan1000 » Tue, Jul 07, 2020, 10:56 AM UTC

moring wrote: post #14

With the PDK being open, does anyone know if any kind of NDAs are still required to get a chip fabbed? While free-of-charge fabbing is quite nice, I think being NDA-free is even more important so all work including the tweaks necessary for fabbing can be published, e.g. on GitHub. BTW, it will be nice to try this together with the OpenROAD tools [1]. They have support for Google's PDK on their to-do list (planned for…