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Google offers free fabbing for 130nm open-source chips

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Re: Google offers free fabbing for 130nm open-source chips

#81

Post by pjc50 »

janekm wrote: post #58
leojfc wrote: post #53

Strategically, could this be part of a response to Apple silicon? Or put another way, Apple and Google are both responding to Intel/the market’s failure to innovate enough in idiosyncratic manner: - Apple treats lower layers as core, and brings everything in-house; - Google treats lower layers as a threat and tries to open-source and commodify them to undermine competitors. I don’t mean this free fabbing can compete…

My first reaction was that it could be a recruitment drive of sorts to help build up their hardware team. Apple have been really smart in the last decade in buying up really good chip development teams and that is experience that is really hard to find.

Does Google have a silicon team?

Re: Google offers free fabbing for 130nm open-source chips

#82

Post by ohazi »

phonon wrote: post #70
ohazi wrote: post #37

Earlier quoted context omitted.

You generally don't do small runs of chips, unless cost is no object. The NRE costs of getting the masks made, even on older processes like these are still comfortably in the $X00,000 range, blowing past $1 million pretty quickly if you need a process that isn't ancient. That's without design software licenses, which can be hundreds of thousands more. So the minimum order quantity usually needs to be at least in the…

You don't need your own mask; you can share with other customers. https://en.wikipedia.org/wiki/Multi-project_wafer_service https://www.tekmos.com/products/asics/reducing-the-asic-nre

Yes, this is what Google is doing with this project.

Re: Google offers free fabbing for 130nm open-source chips

#83

Post by pjc50 »

awelkie wrote: post #67
pjc50 wrote: post #35

Earlier quoted context omitted.

> Is it plausible to get better performance/watt for a custom chip on 130nm vs a software application running on a 7m chip? This very, very much depends on what the algorithm is (integer or FP? how data dependent?), but I would say no for almost all interesting cases. The only exception would be if you're doing a "mixed signal" chip where some of the processing is inherently analogue and you can save power compared t…

An open source WiFi chip would be super cool. I wonder how easy it would be to take the FPGA code from openwifi[0] and combine it with a radio on the same chip? [0] https://github.com/open-sdr/openwifi

The problem is that analogue IC design is a field that even digital IC design people regard as black magic. It's clearly possible for that to happen but the set of people who have the skills to do it is very narrow and most of them are probably prevented from doing it in their spare time by their employment agreements.

I wonder how many "test chips" Google will let a non-expert team do to get it right? And whether they provide any "bringup" support?

Re: Google offers free fabbing for 130nm open-source chips

#84

Post by andy_ppp »

leojfc wrote: post #53

Strategically, could this be part of a response to Apple silicon? Or put another way, Apple and Google are both responding to Intel/the market’s failure to innovate enough in idiosyncratic manner: - Apple treats lower layers as core, and brings everything in-house; - Google treats lower layers as a threat and tries to open-source and commodify them to undermine competitors. I don’t mean this free fabbing can compete…

I mean someone else said the software to design chips is 5 figures per seat so probably a multi billion dollar industry.

My guess would be a cloud based chip design software is in the works. This would accelerate AI quite a bit I should think?

Re: Google offers free fabbing for 130nm open-source chips

#85

Post by daanluttik »

pjc50 wrote: post #81
janekm wrote: post #58

Earlier quoted context omitted.

My first reaction was that it could be a recruitment drive of sorts to help build up their hardware team. Apple have been really smart in the last decade in buying up really good chip development teams and that is experience that is really hard to find.

Does Google have a silicon team?

They created TPU's right? So somewhere inside the alphabet group they must have some expertise

Re: Google offers free fabbing for 130nm open-source chips

#86

Post by stjo »

mhh__ wrote: post #41
est31 wrote: post #6

This is amazing. I think the main reason why open source has taken off is because access to a computer is available to many people, and as cost is negligible, it only required free time and enough dedication + skill to be successful. For hardware though, each compile/edit/run cycle costs money, software often has 5-digit per seat licenses, and thus the number of people with enough resources to pursue this as a hobby…

Not only is the software expensive it's often crap. By which I don't mean, oh no it doesn't look nice - crap as in productivity-harming. For example, Altium Designer is probably the most modern (not most powerful although close) PCB suite and yet despite costing thousands a seat it is a slow, clunky, single-threaded (in 2020) program (somehow uses 20% of a 7700k at 4.6GHz with an empty design). Discord also thinks th…

> Discord also thinks that Altium Designer is some kind of Anime MMO

Hardly Altium Designer's fault, but I too would avoid using it.

Re: Google offers free fabbing for 130nm open-source chips

#87

Post by phonon »

DCKing wrote: post #54
herio wrote: post #49

Earlier quoted context omitted.

The Apollo core is not open source. There are some other pretty nice and featured 68k cores that are open source (TG68, WF68K30L etc.) but none that is really close to the features and performance of the Apollo 68080.

Ah that's a shame. I suppose this could be used to perform a revival of 68k without the Apollo core, but it's a shame that the engineering effort already there would not be available. Maybe this would be an incentive for them to open source it, but yeah.

They have a slack channel... :-)

https://wiki.apollo-accelerators.com/doku.php/about_us:links

Re: Google offers free fabbing for 130nm open-source chips

#88

Post by trsohmers »

pjc50 wrote: post #81
janekm wrote: post #58

Earlier quoted context omitted.

My first reaction was that it could be a recruitment drive of sorts to help build up their hardware team. Apple have been really smart in the last decade in buying up really good chip development teams and that is experience that is really hard to find.

Does Google have a silicon team?

As of a year and a half ago they had over 300+ people across Google working on silicon (RTL, verification, PD, etc) that I’m aware of.

Re: Google offers free fabbing for 130nm open-source chips

#89

Post by MayeulC »

dTal wrote: post #25

Can anyone venture a guess as to why Google might be doing this? What's the incentive structure here?

I wrote something similar above, but maybe a bit like Microsoft acquiring LinkedIn? To get a list of chip designers that could possibly work at Google? Since the designs are open source, they can also evaluate their skill level. And lastly, the contributors are probably less likely to already work at IC companies that have NDAs, etc.

Re: Google offers free fabbing for 130nm open-source chips

#90

Post by qaute »

stephen_g wrote: post #21
blackrock wrote: post #10

I wonder if you can make micro machines at this level? The MEMS thing. I always wondered why you needed gearing mechanisms in a micro machine. Has there ever been a practical application for gears in MEMS?

Not with this PDK or process, no. MEMS processes are quite specialised, and I beleive this project only supports digital standard cells currently, with IO and analogue/RF stuff coming out eventually (it's on the roadmap in the slides).

> I wonder if you can make micro machines at this level? The MEMS thing.

At this size range, though state-of-the-art MEMS (mechanical vibrating frequency filters for RF receivers in phones, accelerometers) can have sub-100nm dimensions, basic accelerometers, pressure sensors, and inkjet heads are absolutely doable.

> Not with this PDK or process, no. MEMS processes are quite specialised.

But yeah, this is the problem. Although ICs and MEMS devices are made with similar tools, MEMS usually needs processing steps that don't play nicely with the steps in an IC process (e.g., etching away huge amounts of silicon to leave gaps and topography, or using processing temperatures and materials that mess up ICs). This SkyWater process cannot do MEMS.

A more general problem is that different MEMS devices often need different incompatible process steps, so a standardized process is infeasible (though http://memscap.com/products/mumps/polymumps tries).

However, there is a tiny chance that, if we get enough detail on the process steps and leeway in the design rules, a custom layout could implement a rudimentary accelerometer or something that works after post-processing (say, a dangerous HF bath), but only with intimate knowledge of said process steps (e.g., internal material stress levels) and a lot of luck.

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