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WebFPGA (2019)

webfpga.io

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Re: WebFPGA (2019)

#31
post #2

Outside of hello worlds, I’m always struggling to find a use case for such small boards. Any ideas?

For FPGAs in general: When latency is important. Even a $1 MCU has a huge amount of compute power nowadays, and they can simulate many things, but if you need to deterministically react within 1 microsecond to what happens on a pin, and your MCU doesn't already have a hardware peripheral that does exactly what you want, you're probably going to need an FPGA.

Some recent advances, like the Raspberry Pi Pico's PIO units, have made it possible to do things that MCU's couldn't do before, like emulating a ROM chip. But there are limits to what the PIOs can do.

If it comes to pure computation and not latency, you need some very specific use case before an FPGA becomes better than a regular CPU. Most likely when it involves massive parallelism and custom caches and interconnects. Although nowadays NPUs are starting to fill that niche.

For tiny boards in particular: getting experience and having fun.

Re: WebFPGA (2019)

#33

Earlier quoted context omitted.

A trick to fit language models of this size it to remove the word to embeddings from the NN, and have a database to look up a dictionary of words and their embeddings. This way the LLL only need the "core" and you do the reverse for loopup again (kind of Text->RAG->LLM->RAG->Text). Have an example here: https://punnerud.github.io/pyspell/ The example have a limited language of around 1000 words, but make it possible…

wow, that tailscale-in-browser demo is wild..! re: language model - here, the embedding lookup, layers, logits all run on-chip and loops its own output back. the only off-chip piece is the id to string table, i.e. the chip (once I get it!) will speak token ids and my laptop will print them as letters

The demo use WASM/browser when available, but also supports running only on ESP32. Figured out I could offload and give the users a better experience when available.

Thanks for noticing the Tailscale demo. Created a Tailscale-Rust client that supports NAT-traversial, encryption etc. and manage to run on ESP32 (together with the local LLM). Just the Tailscale part can be found here: https://github.com/punnerud/tailscale-mpe-rust

Re: WebFPGA (2019)

#34

(2019). What's the latest on sub-$100 FPGAs this decade, anything significantly better than the Mojo I picked up back in 2013 to tinker with?

The fomu is fully open source, supports an open toolchain, and fits in your USB port. $50 https://www.crowdsupply.com/sutajio-kosagi/fomu

It's capable enough to run a risc v softcore

Re: WebFPGA (2019)

#38

(2019). What's the latest on sub-$100 FPGAs this decade, anything significantly better than the Mojo I picked up back in 2013 to tinker with?

I just picked up this as a dev board which has an RPi mcu attached and supports Diligent pmods:

https://tinyvision.ai/products/raspberry-pi-pico-2-developme...

Re: WebFPGA (2019)

#40

(2019). What's the latest on sub-$100 FPGAs this decade, anything significantly better than the Mojo I picked up back in 2013 to tinker with?

Depends on what you're wanting to do. The OSS toolchains have matured a lot since then, with parts from Lattice being fairly well supported if you don't want to touch a vendor's tooling. Gowin have some of the more interesting new parts which sit on a different part of the cost/feature curve. The Tang Nano boards seem fairly popular but I only have experience with far larger GW5 parts. The newer parts from Intel/AMD…

The CE40-HX1K iCEstick has inexplicably increased to $158 on the Lattice Store. Pretty spendy for 1280 LUTs. The Olimex Ltd. ICE40HX1K-EVB might be a good substitute at $21.
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