Live data from Hacker News

A third world engineer responds to “RISC-V: They should have known better”

rvembedded.com

331–340 of 350 posts

Re: A third world engineer responds to “RISC-V: They should have known better”

#331

Beautiful. I read the "They Should Have Known Better" article and forgot it. I've seen this before. I know it's hot air and does not matter, and I can't afford to worry about things that don't matter. When I say I've seen this before, I'm talking about ancient history: controversies so old and so laughable that they've been forgotten. When, for example, AMD handed the world AMD64/X86_64, the same things were said: fr…

ESP32-P31s are cheap - samples are cheap ($5-6 for WROOM modules) production prices are going to be lower - and twice the number of pins ESP32s are known for (but say goodbye to castelated modules hand soldering is going to be harder)

"but say goodbye to castelated modules hand soldering is going to be harder"

Yes, the package will be less friendly to DIY assembly. The greater number of GPIO are definitely welcome however: it's a high feature device and they are needed.

Re: A third world engineer responds to “RISC-V: They should have known better”

#332

Earlier quoted context omitted.

Getting RISC-V to have better performance is a matter of in-chip optimizations (caches, pipelines, etc.) and high quality performance oriented fabs. The dominance of x86 after the dot-com bubble popped shows that one can get incredible performance even from an ISA which is a hack on top of a hack on top of another hack. [1] In terms of a “theoretically even better ISA”, if anyone has any proposals, I would love to se…

> [1] I will make one ISA propsal: x86_64 should have had 32 instead of 16 registers, but 16 registers at least is quite a bit better than the 4-8 registers the 386 had. Is "registers" still a real thing or its just an illusion at this point? I am pretty sure there are "virtual" registers or micro instructions (something like that, I forgot the terminology)

> Is "registers" still a real thing or its just an illusion at this point? I am pretty sure there are "virtual" registers or micro instructions (something like that, I forgot the terminology)

https://en.wikipedia.org/wiki/Register_renaming ?

But yes, register count is still a thing. Why? If you run out of registers, operations 'spill out' into main memory. Read: L1 (data) cache. Which is fast, but not as fast as CPU registers. And probably uses a lot more transistors & power.

Of course there's limits to that due to # of opcode bits available (eg. 32 regs, 3-operand instruction -> 15 bits needed to encode source & target registers).

Re: A third world engineer responds to “RISC-V: They should have known better”

#333

Earlier quoted context omitted.

Thanks for that information! I have been interested in getting x86 produced in smaller nanometer (e.g. https://ei2030.github.io/FemtoTX/#about Edit: It also appears Nvidia might also have an x86 license: https://www.nvidia.com/en-us/drivers/uli-m6117c/ Also, https://www.tomshardware.com/pc-components/cpus/intel-licens... (Caveat: The startup is acquainted with the Intel CEO, so it's rare for them to grant the x86 lic…

x86_64 is itself well over 20 years old. You don't have to pay for it. And at this point SSE4 is on the verge of escaping patents, so a new startup might as well aim for that level. AVX is where you might run into patent fuss, but AVX isn't particularly important.

I had the same thought too months ago. In fact, I speculated the i840 GPU could also be integrated. Might the i915 GPU (GMA 900) also be ready for patent expiration?? https://inavoyage.blogspot.com/2026/01/the-nm10-chipset-back... although, the Sandy Bridge process would be ideal in terms of efficient iGPU integration.

Re: A third world engineer responds to “RISC-V: They should have known better”

#334
post #298

Earlier quoted context omitted.

> They are great for hobbyists due to their low barrier to entry, but there really isn't a niche they serve when it comes to mass-produced electronics. This. Just programming a microcontroller is generally a pain, but a pain that hardware manufacturers can deal with, because they have employees with experience, who can read the long datasheets, get proper programmers and run the manufacturers software packages to pro…

> technically it's the same with proper RPis, where they're the only SBC board (not x86 baed) that you're guaranteed will have at least some software support after 5+ years This isn't quite true, though it's true at the RPi's price point. For example, Toradex (disclosure: I work for Toradex) produces the colibri-imx6 system-on-module that can be turned into an SBC with a stock carrier board. It was introduced in 2014…

This is often a gilded cage. Think about it. On one hand Great, you dont have to redesign your SBC, that would take whole ~1-2 engineering man months (small simple SBC at not bureaucratic nightmare small to middle size company, obviously man hours go thru the window at big many cook orgs). On the other hand you keep shipping SLOW AS ASS SBC to your customers while Chinese competition keeps redesigning _every year_ and offers smoother UI experience with more features for less money.

Re: A third world engineer responds to “RISC-V: They should have known better”

#335

Earlier quoted context omitted.

> [1] I will make one ISA propsal: x86_64 should have had 32 instead of 16 registers, but 16 registers at least is quite a bit better than the 4-8 registers the 386 had. Is "registers" still a real thing or its just an illusion at this point? I am pretty sure there are "virtual" registers or micro instructions (something like that, I forgot the terminology)

> Is "registers" still a real thing or its just an illusion at this point? I am pretty sure there are "virtual" registers or micro instructions (something like that, I forgot the terminology) https://en.wikipedia.org/wiki/Register_renaming ? But yes, register count is still a thing. Why? If you run out of registers, operations 'spill out' into main memory. Read: L1 (data) cache. Which is fast, but not as fast as CPU…

> But yes, register count is still a thing. Why? If you run out of registers, operations 'spill out' into main memory. Read: L1 (data) cache. Which is fast, but not as fast as CPU registers. And probably uses a lot more transistors & power.

Yes, register renaming. What I mean is that why does anyone care still what instruction I am running on? The CPU have its own microops, instruction decoder, its own pipeline, scheduler, etc etc

Why can't you have a CPU that have 1024 registers and pretend that it only have 32?

Re: A third world engineer responds to “RISC-V: They should have known better”

#336

> From that position, the difference between a ten cent part and a one dollar part is not a rounding error Idk, if your shipping cost is $120, it sounds to me $1 is rounding error.

You can avoid the shipping cost by shipping from china, but then only RISC v chips are reliable.

I really doubt that, unless someone did some research, there is no proof that those cheap RISC V chip are more reliable than those clone ARM chip.

I bet they use the same pipeline to produce those chip anyway.

Re: A third world engineer responds to “RISC-V: They should have known better”

#337
post #261
post #233

Earlier quoted context omitted.

I feel like the Raspberry Pi products are inherently a special case. They're probably produced in far greater numbers than most off-the-shelf STM32 or CH32V chips. You've got a huge ready market in hobbyist/educational products as well as the commercial products that have used it as a convenient choice. There's that whole non-profit/educational heritage around them that likely selects for a different set of defaults…

> They're probably produced in far greater numbers than most off-the-shelf STM32 or CH32V chips. I highly doubt it. The RP2xxx lacks the built-in functionality for use in, say, a car, and it isn't cheap and fully-integrated enough for dime-a-dozen gadget application. They are great for hobbyists due to their low barrier to entry, but there really isn't a niche they serve when it comes to mass-produced electronics.

A big part of the numbers game is on variants though. There's what, eight or ten total RP2040/2350/2354 parts to choose from? So all the volume is split between those.

Conversely, there are a lot more variations within other MCU lineups. Just looking at the WCH CH32v30x datasheet-- a single relatively low-popularity range from a single vendor, the datasheet shows 9 basic models with five different physical form factors, and there are theoretically different SKUs for different temperature ranges, etc.

Re: A third world engineer responds to “RISC-V: They should have known better”

#338

Earlier quoted context omitted.

Asian to Brits definitely means South Asian(probably includes West Asians but I'm not sure about that). They were already bitching about this 30 years ago when the net was standardizing on American English where Asian means East Asian. The term for East Asian was Oriental which is now considered racist/passé for some obscure reason.

It's not obscure. The reason is because a whole class of racist laws use the term. Nobody has seriously tried to reclaim the term, so it is stuck with the connotation it had developed a hundred years ago.

Genuinely curious which class of laws that would be.

I assume you mean in the US but the 1882 Chinese Exclusion Act makes no mention of race and anti-miscegenation laws speak of Mongolians(presumably to mean people of East Asian ancestry in general).

I think Oriental in the US like the alternative Asiatic applied to all Asians from Istanbul to Vladivostok.

Re: A third world engineer responds to “RISC-V: They should have known better”

#339

Earlier quoted context omitted.

My understanding is that RISC-V needs both economies of scale AND chips that are manufactured at the bleeding edge fabs (smallest dies, etc) which is a lot more expensive. It's a chicken and egg problem as there's not (yet?) demand. The architectural limitations will remain until there's incentive to work on it. In many ways it's not much different than Linux was in the 1990s. It was cheap and useful, but often not a…

> RISC-V needs both economies of scale AND chips that are manufactured at the bleeding edge fabs (smallest dies, etc) which is a lot more expensive. It's a chicken and egg problem as there's not (yet?) demand Whatever leading-edge fab capacity (mostly TSMC) was available, is now tied up to supply the ongoing AI boom. And will remain so for the foreseeable future. Even if you'd have a RISC-V product for which demand/e…

The SiFive, Tenstorrent, Rivos (Meta), and Qualcomm RISC-V chips are not fabricated in China. I mean, Chinese suppliers may license their cores of course. But even Chinese RISC-V makers were going to use TSMC until US sanctions got in the way.

Re: A third world engineer responds to “RISC-V: They should have known better”

#340

Earlier quoted context omitted.

SiFive P870 and Tenstorrent Ascalon are pretty much Zen 3. Tenstorrent is supposed to be releasing silicon soon. You can license their cores now. SiFive says customers have the P870 already but I am not sure who those are.

I've seen this claimed before, and just going by SiFive's specint claims the P870 at 2.6GHz should match Zen 3. But for SiFive's last silicon, the HiFive Premier P550, they claimed a specint2006 of 8.65/GHz. That should put the silicon only about 20% slower than an intel i5-6400. But if you look at geekbench scores it's about an order of magnitude slower. Correct me if I'm wrong, but Tenstorrent has yet to ship any o…

> I'd expect Raspberry Pi 4 levels of performance

Well, there is some speculation regarding these chips so no sense arguing too much about it.

That said, the SpacemiT K3 is already faster than a Pi 4 and even substantially faster than a Pi 5 for multi-core and vector stuff. And that is before counting the other 8 “AI cores” it has.

These chips will be quite a bit faster than a K3, so certainly much faster than a Pi 4.

Post reply on HN