for those who are in the industry, it's just a marketing term.
It’s marketing, but everyone is doing it. So you have got to live with it.
It’s exaggerated, but it still represents some degree of progress.
TSMC 2nm Process Disclosure – How Does It Measure Up?
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Re: TSMC 2nm Process Disclosure – How Does It Measure Up?
#22How much would the Non-Recurrent Cost associated with designing a RISC-V CPU using this 2nm? EDA Tools, Photo-Masks, One Time Chip Design Engineer Cost, Simulation/Virtual Verification and so on. I mean every thing till tape-out.
Riscv doesn't need smaller nm. It just needs someone to actually design and release a good core design. 14nm (or 4 or anything in between) is perfectly suffient to make a Riscv chip 10x faster than any Riscv that currently exist.
Re: TSMC 2nm Process Disclosure – How Does It Measure Up?
#23Is there an advantage on going 2nm given the costs? Maybe somebody can clearly answer this here on HN, I love this subject! It's interesting how the whole valuation of TSMC(and some from NVidia) are aligned by their current advantage on the 3nm process. Intel on 18A is literally TSMC's 3nm process + backside power delivery, which means more power efficiency, performance also less heat. It's definitely what they need…
You need high chip volumes to justify the NRE cost of going to 2nm, or you're selling your chips with very high margins (ie. Nvidia).
Just saw this podcast: https://www.youtube.com/watch?v=hvQvrLjlJN8
CEO of ASML, he sees a path for the next 5-15 years for a 2 year cadence of transistor scale doubling. That's a bit slower than 18 months, which it was earlier.
Re: TSMC 2nm Process Disclosure – How Does It Measure Up?
#24How much would the Non-Recurrent Cost associated with designing a RISC-V CPU using this 2nm? EDA Tools, Photo-Masks, One Time Chip Design Engineer Cost, Simulation/Virtual Verification and so on. I mean every thing till tape-out.
3nm was over a half billion. So if costs are going up at the same rate, over a billion dollars. https://semianalysis.com/2022/07/24/the-dark-side-of-the-sem...
That article refers to those charts by McKinsey as "incorrect" and instead gives a figure of $50M-$75M for 3nm.
Re: TSMC 2nm Process Disclosure – How Does It Measure Up?
#25So, Intel has its better "18A" process and we have no idea when they will start production at scale and where? Weird.
What do you mean? Intel says that 18A will be a thing around mid of 2025, so 4-6 months from now, I think. Then it will upgrade to HVM between Q3 and Q1 iirc
In late 2013 Intel said 10nm was coming in 2015.
Re: TSMC 2nm Process Disclosure – How Does It Measure Up?
#26How much would the Non-Recurrent Cost associated with designing a RISC-V CPU using this 2nm? EDA Tools, Photo-Masks, One Time Chip Design Engineer Cost, Simulation/Virtual Verification and so on. I mean every thing till tape-out.
Riscv doesn't need smaller nm. It just needs someone to actually design and release a good core design. 14nm (or 4 or anything in between) is perfectly suffient to make a Riscv chip 10x faster than any Riscv that currently exist.
14nm or so is kind of a sweet spot for general purpose chip design right now, because later nodes turn out to have higher overall per-transistor cost despite the improvement in density and area. Of course this may well change over time as even finer production nodes get developed and the existing nodes then move closer to the trailing edge.
Re: TSMC 2nm Process Disclosure – How Does It Measure Up?
#27> This paper continued TSMC’s trend over the last several years of presenting marketing papers at IEDM instead of technical papers. [...] there are no pitches in the paper, no SRAM cell size, and that graphs are all relative
Sigh. So basically we assume this is all aspirational spin and that either they haven't finalized the parameters for the process yet or they know the numbers will be disappointing already.
The era of VLSI scaling is over for sure. Hilarious that Intel's complete failure at process development happened at exactly the moment where it could do the least damage.
Re: TSMC 2nm Process Disclosure – How Does It Measure Up?
#28> This paper continued TSMC’s trend over the last several years of presenting marketing papers at IEDM instead of technical papers. [...] there are no pitches in the paper, no SRAM cell size, and that graphs are all relative Sigh. So basically we assume this is all aspirational spin and that either they haven't finalized the parameters for the process yet or they know the numbers will be disappointing already. The er…
That's not what they're saying - they say it's been a trend over the past several years. VLSI scaling is still continuing, and the article mentions that TSMC seems to have the best numbers, though at higher per-die cost than the authors expected or found reasonable.
Re: TSMC 2nm Process Disclosure – How Does It Measure Up?
#29> This paper continued TSMC’s trend over the last several years of presenting marketing papers at IEDM instead of technical papers. [...] there are no pitches in the paper, no SRAM cell size, and that graphs are all relative Sigh. So basically we assume this is all aspirational spin and that either they haven't finalized the parameters for the process yet or they know the numbers will be disappointing already. The er…
That's not what they're saying - they say it's been a trend over the past several years. VLSI scaling is still continuing, and the article mentions that TSMC seems to have the best numbers, though at higher per-die cost than the authors expected or found reasonable.
Right, that's the spin. You have to put a "seems to" on "have the best numbers" because there are no numbers. If there numbers were the "best", then they would give them. They did not. So... they probably aren't. Or there are other complexities they don't want to reveal.
Re: TSMC 2nm Process Disclosure – How Does It Measure Up?
#30Earlier quoted context omitted.
That's not what they're saying - they say it's been a trend over the past several years. VLSI scaling is still continuing, and the article mentions that TSMC seems to have the best numbers, though at higher per-die cost than the authors expected or found reasonable.
Right, that's the spin. You have to put a "seems to" on "have the best numbers" because there are no numbers . If there numbers were the "best", then they would give them. They did not. So... they probably aren't. Or there are other complexities they don't want to reveal.
> If there numbers were the "best", then they would give them. They did not. So... they probably aren't.
I'm not sure that we can say that. They may be keeping their cards close to their chest for any number of reasons. Unless they think they also had "bad" numbers in the past several years when they were doing the same thing.