Earlier quoted context omitted.
> The end of Dennard scaling was why the Pentium 4 architecture was a dead end and never hit 10Ghz like it was supposed to I've always been puzzled by this. Did Intel really not see this coming? I remember talking to Intel engineers way back when they were promising 10GHz in the near future - I think the codename at the time was Tejas. They seemed very confident. The architecture must have already been planned out -…
Intel (and almost everyone else tbh) didn’t fully appreciate how Denard scaling would play out at smaller nodes. They expected to keep lowering the transistor threshold voltage alongside transistor size but that became increasingly difficult due to leakage currents.
They also played with tricks like strained silicon on 90nm and high-k metal gate in 45 nm in order to boost performance and lower leakage respectively.