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Zilog Z80 CPU – Modern, free and open source silicon clone

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Re: Zilog Z80 CPU – Modern, free and open source silicon clone

#31

Post by mk_stjames »

chx wrote: post #4
Renaud wrote: post #2

What Tiny Tapeout is doing is amazing. Who would have thought that makers and students could have their own chip design made real for so little money? The tools look amazing as well. You'll won't design the next Intel CPU on that 130nm process but to think that the Z80 will fit on 0.064 mm2 is just amazing. It's great that there will still be an alternative to the official chip now that it won't be manufactured any m…

To save a click > 160 x 100 um tile + ASIC + demonstration board: The standard price is $300 plus shipping. > However, Efabless is sponsoring a special early bird offer of $150 (plus shipping), limited to one order per person. > Each extra tile is $50, and extra analog pins start from $40 per pin. Unless I am badly mistaken 160 x 100 um is .16 x .1 mm which means the tile is 0.016 mm2 meaning a 0.064 mm2 die takes fo…

Yes it is taking up a 2x2 tile on the tinytapeout.

https://app.tinytapeout.com/projects/668

Re: Zilog Z80 CPU – Modern, free and open source silicon clone

#33

Post by swetland »

drmpeg wrote: post #6
Retr0id wrote: post #5

Does anyone know what clock speeds we might be able to expect from this?

This page says 50 MHz. https://github.com/rejunity/z80-open-silicon/blob/main/docs/...

That's the expected clock rate for the TT07 run... but Tiny Tapeout designs only have 8 in, 8 out, and 8 bidirectional IOs (plus a reset and clock input) available, so they're using a multiplexing strategy where the Z80 clock runs at 1/4 of the base clock rate and alternates between control signals, A0-A7, control signals, and A8-A15 on the OUT pins:

https://github.com/rejunity/z80-open-silicon/blob/68438f0019...

So you'd get an effective 12.5MHz Z80 clock and need a bit of external logic to demultiplex the full IO interface. Still not too shabby!

The goal (per the project README) appears to be to prototype with TT07 and then look into taping out standalone with ChipIgnite in QFN44 and DIP40 packages (which would be able to have the full traditional Z80 bus interface and run at the full clock rate).

Re: Zilog Z80 CPU – Modern, free and open source silicon clone

#34

Post by rowanG077 »

chx wrote: post #4
Renaud wrote: post #2

What Tiny Tapeout is doing is amazing. Who would have thought that makers and students could have their own chip design made real for so little money? The tools look amazing as well. You'll won't design the next Intel CPU on that 130nm process but to think that the Z80 will fit on 0.064 mm2 is just amazing. It's great that there will still be an alternative to the official chip now that it won't be manufactured any m…

To save a click > 160 x 100 um tile + ASIC + demonstration board: The standard price is $300 plus shipping. > However, Efabless is sponsoring a special early bird offer of $150 (plus shipping), limited to one order per person. > Each extra tile is $50, and extra analog pins start from $40 per pin. Unless I am badly mistaken 160 x 100 um is .16 x .1 mm which means the tile is 0.016 mm2 meaning a 0.064 mm2 die takes fo…

I could not find the pin capabilities. Is it possible to build an sdram controller or even drive ddr?

Re: Zilog Z80 CPU – Modern, free and open source silicon clone

#35

Post by unnah »

Someone wrote: post #30
rvense wrote: post #24

Earlier quoted context omitted.

That's wild. A Pentium III would still be useful in a pinch. How big was a P3 die, though?

https://en.wikipedia.org/wiki/Pentium_III#Katmai : “The Katmai contains 9.5 million transistors, not including the 512 Kbytes L2 cache (which adds 25 million transistors), and has dimensions of 12.3 mm by 10.4 mm (128 mm²). It is fabricated in Intel's P856.5 process, a 250 nm complementary metal–oxide–semiconductor (CMOS) process with five levels of aluminum interconnect” That’s 2,000 times the area of this 0.064 mm²…

On that kind of process, you could make a 1024-core Z80 machine, leaving half the area for memory, interconnect and I/O. With suitably smart programming and an embarrassingly parallel problem, it might even be able to beat a Pentium III in performance... although it looks like the single-core Pentium III can run 128-bit SSE instructions at 2 cycles per instruction.

Re: Zilog Z80 CPU – Modern, free and open source silicon clone

#36

Post by skywal_l »

ashleyn wrote: post #13
Renaud wrote: post #2

What Tiny Tapeout is doing is amazing. Who would have thought that makers and students could have their own chip design made real for so little money? The tools look amazing as well. You'll won't design the next Intel CPU on that 130nm process but to think that the Z80 will fit on 0.064 mm2 is just amazing. It's great that there will still be an alternative to the official chip now that it won't be manufactured any m…

130nm process puts them at roughly Pentium III era. Not bad!

Actually more of a Pentium IV.

    Pentium III: 250 nm to 130 nm [0]
    Pentium VI: 180 nm to 65 nm [1]
Which is indeed amazing.

[0] https://en.wikipedia.org/wiki/Pentium_III

[1] https://en.wikipedia.org/wiki/Pentium_4

Re: Zilog Z80 CPU – Modern, free and open source silicon clone

#38

Post by ein0p »

phendrenad2 wrote: post #32

I wonder if this will ever be priced competitively with the massive number of used or NOS Z80 chips out in the wild.

eBay says a Chinese Z80 clone is less than $4 with free shipping. This isn’t even going to be competitive with lower end FPGAs. It’s more of a fun “why not” type of project.

Re: Zilog Z80 CPU – Modern, free and open source silicon clone

#39

Post by becurious »

flohofwoe wrote: post #17
tcbawo wrote: post #15

I had heard about Z80’s 4-bit ALU (2x for 8-bit math). Is this considered a major bottleneck? Were there later extensions that added higher bit integer math? I’m curious whether an open source version of the chip will enable new features and variants.

> Is this considered a major bottleneck? No, because an ALU instructions with a register as source is already running as fast as possible (at 4 clock cycles, which is the duration of an opcode fetch 'machine cycle'). Or from a different perspective: an 8-bit ALU wouldn't have made math instructions faster, but would have cost twice as many transistors. The 4-bit ALU is just an internal implementation detail that isn'…

Cycle counting was key on the Spectrum - for obvious things like the tape load routines but also for advanced techniques like the ‘Rainbow processor’ - updating the attribute bytes (those responsible for the infamous color clash) as each scan line progressed you could get different colors on each scan line.

Re: Zilog Z80 CPU – Modern, free and open source silicon clone

#40

Post by lelanthran »

RetroTechie wrote: post #22
robxorb wrote: post #7

For those wondering, the 6502 and various derivatives are still being manufactured, by one of its original creators [0] - so I'd guess an equivalent development in the world of the Z80's nemesis is unlikely anytime soon. [0] https://www.westerndesigncenter.com/wdc/chips.php

It would be interesting to know Zilog's sale volumes for discrete Z80s (say, over the past decade). What uses they were purchased for, and DIP/PLCC/flatpack ratios. There must be millions floating out there. But with distributors like Mouser or Farnell gone, for anyone looking to buy some, it's eBay & co which tends to be a crapshoot.

> It would be interesting to know Zilog's sale volumes for discrete Z80s (say, over the past decade).

Not the past decade, but two decades ago (2005) the z80 was still popular. At work, I was working on a product based on, IIRC, a Rabbit Semiconductor product, which was a module with on-chip ethernet. It was a Z80 running at 40Mhz.

Personally, I also had a little siemens organiser thing, that also was z80 based (not sure of the actual specs). I recall trying to write programs for it and failing (may not have been open; no way to reprogram or download new code to it, maybe).

[EDIT: The organiser was a siemens IC35]

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