21–30 of 75 posts
Earlier quoted context omitted.
65*C*02, which might fail if your 6502 code depends on illegal opcodes or incidental memory access or BCD math cycle timing or BCD math flags or perhaps decimal mode being set in an interrupt routine.
The 65C02 came out in 1983, so I think we've had plenty of time to document and workaround these issues!
For those wondering, the 6502 and various derivatives are still being manufactured, by one of its original creators [0] - so I'd guess an equivalent development in the world of the Z80's nemesis is unlikely anytime soon. [0] https://www.westerndesigncenter.com/wdc/chips.php
There must be millions floating out there. But with distributors like Mouser or Farnell gone, for anyone looking to buy some, it's eBay & co which tends to be a crapshoot.
Z80 was the CPU of the ZX Spectrum. Oh the memories... https://en.wikipedia.org/wiki/ZX_Spectrum
So many good machines: the Amstrad CPC range, a whole slew of Sega consoles, the early MSX stuff and of course the Tatung Einstein. 3 inch disk machines of the world unite!
Punch-Out!!
But most noteworthy is Galaga: Ran on 3, count 'em, 3, Z80's.
What Tiny Tapeout is doing is amazing. Who would have thought that makers and students could have their own chip design made real for so little money? The tools look amazing as well. You'll won't design the next Intel CPU on that 130nm process but to think that the Z80 will fit on 0.064 mm2 is just amazing. It's great that there will still be an alternative to the official chip now that it won't be manufactured any m…
130nm process puts them at roughly Pentium III era. Not bad!
Earlier quoted context omitted.
So many good machines: the Amstrad CPC range, a whole slew of Sega consoles, the early MSX stuff and of course the Tatung Einstein. 3 inch disk machines of the world unite!
You forgot about Donkey Kong (and Junior, and 3, and Mario Bros.) Punch-Out!! But most noteworthy is Galaga: Ran on 3, count 'em, 3, Z80's.
For those wondering, the 6502 and various derivatives are still being manufactured, by one of its original creators [0] - so I'd guess an equivalent development in the world of the Z80's nemesis is unlikely anytime soon. [0] https://www.westerndesigncenter.com/wdc/chips.php
https://arstechnica.com/gadgets/2024/04/after-48-years-zilog...
https://en.wikipedia.org/wiki/Zilog_eZ80
Does anyone know what clock speeds we might be able to expect from this?
This page says 50 MHz. https://github.com/rejunity/z80-open-silicon/blob/main/docs/...
"Guy Hutchison (see TV80 project) has synthesized an early version of the core in a 130nm TSMC process. He determined the design to contain about 20k gates and run at about 240 Mhz. While the speed is somewhat less than "target", optimizations of the logic should increase this somewhat."
Guy Hutchison's TV80 is also mentioned on this project's page.
For those wondering, the 6502 and various derivatives are still being manufactured, by one of its original creators [0] - so I'd guess an equivalent development in the world of the Z80's nemesis is unlikely anytime soon. [0] https://www.westerndesigncenter.com/wdc/chips.php
I couldn’t help but notice that the circuit layout looks like a uniform gate array rather something resembling a custom layout you usually see in die photos.
For instance here's the LD A,(DE) "instruction payload":
https://github.com/rejunity/z80-open-silicon/blob/974c7711b2...
And here's the same machine cycle in my software emulator:
https://github.com/floooh/chips/blob/bd1ecff58337574bb46eba5...
Both set the address bus to the content of the DE register (and at the same time the MREQ|RD pins need to be set somewhere to indicate a memory read to the outside world, in my emulator this happens in the _mread macro), and in the next clock cycle load the data bus into the A register.
What's interesting though is that the Verilog implementation doesn't seem to update the internal WZ register with DE+1, which makes me wonder if undocumented behaviour is correctly implemented, but maybe updating WZ is handled elsewhere (there are references to the WZ register in other places).
In the end, if it looks and feels like a Z80 from the outside (e.g. the right pins are active at the right time) the internal implementation doesn't matter.
Earlier quoted context omitted.
130nm process puts them at roughly Pentium III era. Not bad!
That's wild. A Pentium III would still be useful in a pinch. How big was a P3 die, though?
“The Katmai contains 9.5 million transistors, not including the 512 Kbytes L2 cache (which adds 25 million transistors), and has dimensions of 12.3 mm by 10.4 mm (128 mm²). It is fabricated in Intel's P856.5 process, a 250 nm complementary metal–oxide–semiconductor (CMOS) process with five levels of aluminum interconnect”
That’s 2,000 times the area of this 0.064 mm² Z80.
https://en.wikipedia.org/wiki/Pentium_III#Tualatin:
“The third revision, Tualatin (80530), was a trial for Intel's new 130 nm process”
I can’t easily find the die size if that.