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Intel is all-in on backside power delivery

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91–100 of 166 posts

Re: Intel is all-in on backside power delivery

#91

Earlier quoted context omitted.

And meanwhile they're both getting cucked by Apple because the Intel/AMD brand monoliths are too heavy to make any groundbreaking/architectural changes now.

AMD's Zen 4 chips are competing with Apple's M2 on performance and at least closing the gap on efficiency. Intel's Alder Lake is losing on efficiency but is still trading blows for performance. I am generally a fan of Apple but the M2 was just a modest iteration of the M1, it's not a groundbreaking architectural change either. Even the Pro/Max/Ultra die multiplication strategy is unlikely to continue competing much l…

In most aspects.

The m2 chip is more power efficient, but it can't compete against Intel and amd

Re: Intel is all-in on backside power delivery

#92
post #73
post #67

Earlier quoted context omitted.

Does Backside Power Delivery mean the silicon area of the chip will be placed upside down on the motherboard to ensure efficient heat dissipation? (Since the power source will be on the opposite side compared to current day silicon) P.s. in case you never heard of BPD technology, https://semiengineering.com/challenges-in-backside-power-del... is also informative (thanks @rektide for the Anand link!) Edit: Relevant qu…

Previously we were using flip chip where silicon was exposed. With backside power delivery, there's now wiring on both sides of the chip. The transistors are buried. The article discusses how debugging is harder since nothing is exposed, and how there's now more thermal resistance. Intel's implementation has other factors, as discussed in the Anandtech article. Normally there's a fairly thick silicon base underneath…

They must have a way to reach and debug the signal layers, at least in the lab?

If not, I would intuitively think this whole approach would fail?

Re: Intel is all-in on backside power delivery

#93
post #82

Backside power delivery should help portables and maybe get some of these crazy desktop numbers down. If all goes as planned Intel looks to have a 2 year jump on TSMC based on current timetables. But I'm worried about them adding nanosheet transistors around the same time. They got into problems before being too ambitious and having a stalled roadmap for a very long time.

Assuming they deliver on a timetable they say they will, which intel has had a well established track record of not doing. With intel, over the last 5-10 years I don't believe anything they say until there are chips in peoples hands at a volume that is meaningful.

Gelsinger (re)introduced OKRs a couple of years ago. Everyone's being held accountable for their promises at all levels now. It's probably caused them to stop dreaming so much and get more conservative but predictable.

Re: Intel is all-in on backside power delivery

#94
post #13

I thought the Anandtech coverage did a bit better job filling in both background & details. https://www.anandtech.com/show/18894/intel-details-powervia-...

Ads are getting in the way on mobile. Don’t know how sites like this are going to exist. For me personally the content does not out weigh the ads

Don't ever allow us by default. Use umatrix

Re: Intel is all-in on backside power delivery

#96
post #12

Earlier quoted context omitted.

I'd have it the other way around. Intel's doing OK with cpus but man their P-core is way too big & hot. They've been adding and adding to the same core design for a decade & it's a monster. Also their process is still flagging. They've managed well for such limitations but real change has to come, soon. Meanwhile Arc is kicking ass. It's launch was a dud, but the team has really kept pushing on making the chip run be…

Completely disagree. The new P's are insane. I have an i5-1240p and it's the best chip I've ever owned. 12 cores, 25w tdp.

The -P SoCs are not the same thing as the P-cores contained within. The i5-1240P SoC has 4 P-cores and 8 E-cores. The -P at the end of the model number denotes it as being in the middle product segment of their mobile lineup, between the lower-power -U models and the higher-power -H models. All three product segments use the same P-cores and E-cores, but in varying quantities and clock speeds.

Re: Intel is all-in on backside power delivery

#97

Earlier quoted context omitted.

Chip making is the first industry that was automates by computers. Much like how steam engines were first used in coal mines.

"Chip making is automated." Is not a true statement.

Wow so we still design CPUs on silk screens by hand?

Re: Intel is all-in on backside power delivery

#98

Earlier quoted context omitted.

AMD's Zen 4 chips are competing with Apple's M2 on performance and at least closing the gap on efficiency. Intel's Alder Lake is losing on efficiency but is still trading blows for performance. I am generally a fan of Apple but the M2 was just a modest iteration of the M1, it's not a groundbreaking architectural change either. Even the Pro/Max/Ultra die multiplication strategy is unlikely to continue competing much l…

In most aspects. The m2 chip is more power efficient, but it can't compete against Intel and amd

I don't know about that either, based on Tom's Hardware review of the M2 Ultra it is still pretty competitive and well rounded.

Intel beats Apple at most specs but the margin is too small to say Apple "can't compete", especially for a company that didn't even have a desktop CPU three years ago.

Re: Intel is all-in on backside power delivery

#100
post #31

Unfortunate name.

Reminds me of a few months ago when Nvidia announced their new CuLitho fabrication process, which is Spanish means “cute little ass”. I hope Nvidia adds backside power delivery to their new CuLitho chips, just so we can get as many jokes as possible out of this fab cycle.

Cannot be worst than Audi "etron" which means horseshit in French :)
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