Ask HN: Why is TSMC so competitive in semiconductor fabrication?

Post by tehbeard » Sat, Apr 22, 2023, 3:49 PM UTC

deepnotderp wrote: post #48

chasil wrote: post #33

Earlier quoted context omitted.

A recent interview with Shang-Yi Chiang, former Vice President of R&D at TSMC (also held positions at TI, HP, and SMIC) had insightful commentary on the speed of bringing up a new node. "We all take two years to develop one generation, how come you guys can do it in one or one-and-a-half year?" And they asked if some of your customer transfer technology to you or what not? And I told him, "No," I told him that, "That…

This is a made up explanation because: 1) All RnD fabs move wafers 24/7 2) Intel has consistently been the leader in process technology for 20+ years. Why did this “3x shift advantage” deliver gains only in the past 5 years?

Post by elteto » Sat, Apr 22, 2023, 3:57 PM UTC

Nokinside wrote: post #3

Semiconductor industry has the deepest and most complex value chain in the economy. TSMC has always been pure fab company and it pays off now. Samsung and Intel are also in chip design business and do other things. They are less focused. TSMC's lead is not guaranteed. Any new technology node can fail and remove them from competition if they make wrong choices. I'm not exaggerating when I say that designing a new tech…

Post by hnfong » Sat, Apr 22, 2023, 4:03 PM UTC

elteto wrote: post #53

Nokinside wrote: post #3

Semiconductor industry has the deepest and most complex value chain in the economy. TSMC has always been pure fab company and it pays off now. Samsung and Intel are also in chip design business and do other things. They are less focused. TSMC's lead is not guaranteed. Any new technology node can fail and remove them from competition if they make wrong choices. I'm not exaggerating when I say that designing a new tech…

A bit of an aside, but your comment made me realize how much we don’t know about the process used to create the technologies that underpin our civilization. We (laymen) have no idea about the incredible complexity behind manufacturing a single CPU chip.

Post by rayiner » Sat, Apr 22, 2023, 4:09 PM UTC

kayson wrote: post #34

rayiner wrote: post #15

Earlier quoted context omitted.

The important thing to understand is that at the level of chip manufacturing, you’re doing advanced materials science. These aren’t just abstract logic gates and structures built out of them, such as SRAMs. At the manufacturing level, the logic gates are nano-scale 3D structures made of different materials and in different shapes. For example, at this scale, the shape of the transistor gates has a big effect on perfo…

> NVIDIA and Apple will tell TSMC what logic gates go where (or often at an even higher level—specifying certain SRAM blocks going here or there). That's not quite how design works; it's much much more detailed. At the end of the day, TSMC's customers send them a "GDS" file that is a complete physical representation of the die they want manufactured. It describes every top-to-bottom later of the manufacturing process…

Post by kayson » Sat, Apr 22, 2023, 4:19 PM UTC

rayiner wrote: post #57

kayson wrote: post #34

Earlier quoted context omitted.

> NVIDIA and Apple will tell TSMC what logic gates go where (or often at an even higher level—specifying certain SRAM blocks going here or there). That's not quite how design works; it's much much more detailed. At the end of the day, TSMC's customers send them a "GDS" file that is a complete physical representation of the die they want manufactured. It describes every top-to-bottom later of the manufacturing process…

I was under the impression that it’s unusual for fabless chipmakers to do transistor level design anymore, and that they mostly rely on the standard TSMC libraries. But I may be wrong about that. The critical point I was trying to make is that the ASML machine doesn’t know how to make transistors. That’s something TSMC does: https://www.anandtech.com/show/16041/where-are-my-gaafets-ts...