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Intel's New Chimera: Alder Lake

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Re: Intel's New Chimera: Alder Lake

#171

Post by mhh__ »

bayindirh wrote: post #164
PragmaticPulp wrote: post #160

Earlier quoted context omitted.

> I don’t completely agree. A MacBook Air M1 is 25% faster than a 10th generation Intel 10700K Why is everyone insistent on comparing Apple’s latest CPUs to Intel’s parts from multiple generations back? Intel is on 12xxx series now. AMD also has new generation laptop CPUs that perform very well. Let’s compare to those. The M1 is power efficient but much of that is due to the TSMC process they used. I really don’t und…

Because that’s what I had access when I did the tests. I’ll do a series of tests on our cluster and post these. Will these be meaningful for you? The thing is, M1 on air is a relatively low clock speed CPU with passive cooling. 10200K is actively cooled, unlimited beast of its generation. The libraries I use are X86 optimized. Yet the code I’ve written is 25% faster on ARM. This is significant .

X86 optimized doesn't actually mean that much on a lot of workloads because the memory hierarchy completely dominates performance.

Apple knew this so the M1 has an extremely fast memory system.

Re: Intel's New Chimera: Alder Lake

#172

Post by mhh__ »

bayindirh wrote: post #92
gpderetta wrote: post #77

Earlier quoted context omitted.

Isn't M1 two process nodes ahead of the 10700K?

I'm not telling that process difference isn't the part of the picture, but the process difference is at most half of the story. Working on HPC field and with generations and generations of Intel hardware, I can tell you that two node difference (alone) never gives you 25% real world performance in the realm of Intel, let alone theoretical.

This isn't a normal die shrink though.

This is jumping from Intel's heroically old 14nm+++++++++++++++ to a brand spanking new TSMC process. It might be on the order of 4 to 6 times denser.

Re: Intel's New Chimera: Alder Lake

#173

Post by mhh__ »

inkyoto wrote: post #24
kijiki wrote: post #10

I very much don't understand why Intel didn't disable AVX-512 on the P cores, unless and until the OS writes to a new MSR that means "I understand that the P cores can do AVX-512, while the E cores cannot", and then enable AVX-512 on the P cores. Old OS versions continue to work fine, and newer OS versions can opt into the new world and benefit.

I understand even less why Intel has been creating numerous AVX extensions (1,2 and 512) instead of focusing on a single programmable variable vector length extension that would not require the addition of new opcodes every time the CPU supported maximum vector length increased. It has been clear for a long while that the vector length was going to gradually increase every few years to support new data processing req…

AVX512 is actually quite different to AVX2, it's not just wider AVX.

Re: Intel's New Chimera: Alder Lake

#174

Post by innocenat »

vezycash wrote: post #73
Matthias247 wrote: post #59

Earlier quoted context omitted.

> Personally I don't really see a point in having a hybrid architecture like this unless it'll lead to massively increased core counts What about massively reduced energy consumption and associated loss of head dissipation/noise and increased battery life? Isn't that why Apple and mobile phone SoCs introduced that design in the first place?

> What about massively reduced energy consumption and associated loss of head dissipation/noise and increased battery life? I hope their drivers would work properly with the OS. Else, the user would be locked on either the performance cores or the efficiency cores - it happens with laptops with dual graphics card (intel inbuilt and high performance Nvidia or AMD graphics)

Intel Thread Director has already been included in latest Linux kernel.

Re: Intel's New Chimera: Alder Lake

#175

Post by mhh__ »

astrange wrote: post #106
nicolaslem wrote: post #49

Earlier quoted context omitted.

The secret sauce is most likely TSMC 5nm.

No, that’s cope. There isn’t any secret sauce. It’s just well designed on every level. You won’t match its power/performance by doing one thing and suddenly making it there. Intel’s process is quite close to TSMC’s already.

It's quite close to the process AMD are on but not 5nm that apple use.

A lot of M1's advantage is in terms of density. That's why they were theoretically able to make such an absolutely enormous processor and keep it cool.

Making that theory work in practice came from decades of low power semi experience. They're extremely good chip designers.

Re: Intel's New Chimera: Alder Lake

#176

Post by grishka »

tux1968 wrote: post #162

Anyone else slightly annoyed that the CPUID had to be made the same for both P & E cores, just to accommodate DRM? Making it harder for all software to properly utilize the technology effectively.

I feel like it's a fundamentally bad idea to give P and E cores disparate instructions sets. Apple did it right on the M1 — the cores have different designs, but the E cores support all the instructions the P cores do.

Re: Intel's New Chimera: Alder Lake

#177

Post by innocenat »

rbanffy wrote: post #146
PartiallyTyped wrote: post #139

Earlier quoted context omitted.

AMD does not beat Intel [1] unless we limit the CPUs to the same wattage (see efficiency benchmarks below). [1] https://www.tomshardware.com/uk/news/ryzen-7-5800x3d-vs-core...

If that’s the game we want to play, there’s always POWER to show what you can pull off with an unlimited power (no pun intended) budget.

Some people care about performance per dollar, and Intel can compete with AMD on that front with Alder Lake.

Re: Intel's New Chimera: Alder Lake

#178

Post by lynguist »

adam_arthur wrote: post #143
lynguist wrote: post #95

Earlier quoted context omitted.

There is a massive design gap between all Apple designed chips and non Apple designed chips. Apple’s chips are ridiculously humongous. They’re built for extremely wide, high performance applications for the past 10 years. A single A14 core can do 64 32-bit floating point operations in a single clock cycle. AMD/Intel were long at 16 operations and only the latest Intel went up to 32 operations.

Well, Intel's latest chip has better performance than M1 despite being two process nodes behind. So not sure what you're going on about

Some people care only about maximum absolute performance, others care for performance per Watt. I find the latter much more sensible. What performance Apple can reach in, say, 50W, Intel reaches in 150W.

I have a list of instructions per clock from SPECINT results which I compiled from Web sources. (I didn’t verify the results myself.) I added in rumored future processors with their highest rumored performances:

  Cortex-A73 (ARMv8-A)  64.4
  Pentium M   69.0
  Bulldozer (AMD FX)  76.2
  K10 (Phenom II)   76.7
  Goldmont Plus (Atom 3rd gen+) 77.5
  Core    80.0
  Bobcat    81.3
  Nehalem    90.0
  Cell (PS3)  93.5
  Jaguar (PS4)   93.5
  Sandy Bridge  100.0
  Tremont (Atom 4th gen) 100.7
  Ivy Bridge  105.8
  Cortex-A76 (ARMv8.2-A) 114.7
  Zen   115.9
  Haswell   117.6
  Zen+   119.3
  Gracemont (Atom 5th gen) 120.8
  Broadwell  121.5
  Skylake   124.0
  Zen 2   139.8
  A10 (ARMv8.1-A)  139.8
  Cortex-A77 (ARMv8.2-A) 141.0
  Sunny Cove Ice Lake 146.3
  Cypress Cove Rocket Lake 147.6
  Zen 3   167.4
  Golden Cove Alder Lake 175.6
  A11 (ARMv8.2-A)  186.0
  Cortex-X2 (ARMv9-A) 190.2
  Rumored Golden Cove+ Raptor Lake (’22) 193
  Rumored Zen 4 (’22)  207
  A12 (ARMv8.3-A)  213.8
  Rumored Ocean Cove (’23) 223
  A13 (ARMv8.4-A)  235.0
  A14/M1 (ARMv8.5-A) 236.7

Re: Intel's New Chimera: Alder Lake

#179

Post by fortran77 »

School-Cotton wrote: post #161
zasdffaa wrote: post #21

Earlier quoted context omitted.

> because I sure would love to have more cores available (currently rocking a 32 core Threadripper) wtf do you need more cores for??? Wat are you doing? > not interested in actually pushing HEDT forward since consider buying a server.

Rust or C++ compilation can easily make use of more than 32 cores.

And Erlang programs running can use them all, too.

Re: Intel's New Chimera: Alder Lake

#180

Post by frostwarrior »

PragmaticPulp wrote: post #160
bayindirh wrote: post #39

Earlier quoted context omitted.

I don’t completely agree. A MacBook Air M1 is 25% faster than a 10th generation Intel 10700K, running the same code full of floating point instructions and matrices. It’s not a simple matter of process node. The same MacBook Air can do hour long Skype video calls with ~9% charge consumption, with no discernible heat difference on the body too. M1 is a different beast.

> I don’t completely agree. A MacBook Air M1 is 25% faster than a 10th generation Intel 10700K Why is everyone insistent on comparing Apple’s latest CPUs to Intel’s parts from multiple generations back? Intel is on 12xxx series now. AMD also has new generation laptop CPUs that perform very well. Let’s compare to those. The M1 is power efficient but much of that is due to the TSMC process they used. I really don’t und…

Because it's a huge step compared to most ARM SoCs.

Being able to compete against a consumer high end desktop, even if it's an older one, it's a feat all by itself

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