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Intel's New Chimera: Alder Lake

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Re: Intel's New Chimera: Alder Lake

#21

Post by zasdffaa »

kouteiheika wrote: post #16

Personally I don't really see a point in having a hybrid architecture like this unless it'll lead to massively increased core counts, and so far it doesn't look like it does. AMD still beats Intel in both core counts and power efficiency, and they're only using P cores so... what's the point of having E cores? But maybe that's just because it's a first generation technology for Intel? I hope things improve in the fut…

> because I sure would love to have more cores available (currently rocking a 32 core Threadripper)

wtf do you need more cores for??? Wat are you doing?

> not interested in actually pushing HEDT forward since

consider buying a server.

Re: Intel's New Chimera: Alder Lake

#22

Post by adam_arthur »

kouteiheika wrote: post #16

Personally I don't really see a point in having a hybrid architecture like this unless it'll lead to massively increased core counts, and so far it doesn't look like it does. AMD still beats Intel in both core counts and power efficiency, and they're only using P cores so... what's the point of having E cores? But maybe that's just because it's a first generation technology for Intel? I hope things improve in the fut…

AMD beats them because they are a process node ahead. Dunno why every comment implies there's some design gap that leads to M1 or AMD being more powerful or efficient.

It's 90% the process node. There is no magic design sauce that makes those chips better.

The big/little design change did seem to improve performance quite a bit for Intel, even using the same manufacturing node as before

Re: Intel's New Chimera: Alder Lake

#23

Post by berkut »

kouteiheika wrote: post #16

Personally I don't really see a point in having a hybrid architecture like this unless it'll lead to massively increased core counts, and so far it doesn't look like it does. AMD still beats Intel in both core counts and power efficiency, and they're only using P cores so... what's the point of having E cores? But maybe that's just because it's a first generation technology for Intel? I hope things improve in the fut…

It's quite possible AMD has plans for this type of thing as well: despite their cores being more energy efficient and powerful per watt than Intel, I don't think they can match Apple yet (some of that is due to 5 nm process though).

They have a patent for something similar at least: https://wccftech.com/amd-big-little-processor-cores-show-up-...

Re: Intel's New Chimera: Alder Lake

#24

Post by inkyoto »

kijiki wrote: post #10

I very much don't understand why Intel didn't disable AVX-512 on the P cores, unless and until the OS writes to a new MSR that means "I understand that the P cores can do AVX-512, while the E cores cannot", and then enable AVX-512 on the P cores. Old OS versions continue to work fine, and newer OS versions can opt into the new world and benefit.

I understand even less why Intel has been creating numerous AVX extensions (1,2 and 512) instead of focusing on a single programmable variable vector length extension that would not require the addition of new opcodes every time the CPU supported maximum vector length increased.

It has been clear for a long while that the vector length was going to gradually increase every few years to support new data processing requirements, so the writing has been on the wall all along.

Re: Intel's New Chimera: Alder Lake

#25

Post by kimixa »

berkut wrote: post #15

Other than obvious stuff like differences in features (AVX512 - although I thought that wasn't even officially supported at one point even though they haven't disabled it?) between the P and E cores, how does ARM manage it with big/LITTLE cores? Surely that's similar to a degree (Out of order P cores, in order E cores) to what Intel are attempting? Are Intel just taking it too far in terms of disparity between the ar…

On an android device I worked on some 5 years ago (so might be out of date) it used a simple cpu mask.

Background tasks always used only the little cores, foreground apps always always used only the big cores. I do not believe it was possible for a single app to run threads on both big and little cores.

And my understanding is that every arm big.LITTLE combination supported exactly the same ISA and were intentionally 100% binary compatible. For example, you couldn't pair arm A53 little cores (that support only armv8-a) with A75 big cores (which support armv8.2-a)

Re: Intel's New Chimera: Alder Lake

#27

Post by zdragnar »

quux wrote: post #7
mrath wrote: post #2

I don't have an idea on CPU design. Can this lead to M1 like performance?

The goal of this kind of design is M1 like energy efficiency, not performance (I don't know if the Alder Lake P cores can outperform an M1 P core.) M1 has a similar architecture with performance and efficiency cores, but so far I haven't heard of it causing problems for software developers. All versions of macOS that support M1 also have a scheduler that is able to move threads between E and P cores nicely.

I thought the secret sauce to M1 was largely that it was a new architecture, without the decades of x86 backwards compatible baggage, with an OS and software capable of running natively on it?

Re: Intel's New Chimera: Alder Lake

#28

Post by szastamasta »

zasdffaa wrote: post #21
kouteiheika wrote: post #16

Personally I don't really see a point in having a hybrid architecture like this unless it'll lead to massively increased core counts, and so far it doesn't look like it does. AMD still beats Intel in both core counts and power efficiency, and they're only using P cores so... what's the point of having E cores? But maybe that's just because it's a first generation technology for Intel? I hope things improve in the fut…

> because I sure would love to have more cores available (currently rocking a 32 core Threadripper) wtf do you need more cores for??? Wat are you doing? > not interested in actually pushing HEDT forward since consider buying a server.

I see nothing particularly hard in utilising 32 cores. When I launch all the services in the project I’m working on my os has plenty work to schedule. Right now I have 3732 threads running on my machine. It’s totally separate question if OS can schedule so many threads effectively on so many cores, and how much coordination overhead there will be. But that’s just something we have to figure out and fix.

Re: Intel's New Chimera: Alder Lake

#29

Post by aunty_helen »

zasdffaa wrote: post #21
kouteiheika wrote: post #16

Personally I don't really see a point in having a hybrid architecture like this unless it'll lead to massively increased core counts, and so far it doesn't look like it does. AMD still beats Intel in both core counts and power efficiency, and they're only using P cores so... what's the point of having E cores? But maybe that's just because it's a first generation technology for Intel? I hope things improve in the fut…

> because I sure would love to have more cores available (currently rocking a 32 core Threadripper) wtf do you need more cores for??? Wat are you doing? > not interested in actually pushing HEDT forward since consider buying a server.

Some of us write software for a living. You give me two more cores, I'll use them.

Re: Intel's New Chimera: Alder Lake

#30

Post by heavyset_go »

kouteiheika wrote: post #16

Personally I don't really see a point in having a hybrid architecture like this unless it'll lead to massively increased core counts, and so far it doesn't look like it does. AMD still beats Intel in both core counts and power efficiency, and they're only using P cores so... what's the point of having E cores? But maybe that's just because it's a first generation technology for Intel? I hope things improve in the fut…

ARM's HMP made sense for mobile devices like phones. I don't see any use for big.LITTLE designs on workstations or servers.
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