I feel that P and E split requires putting an asterisk next to the core count. it is dishonest to sell a CPU with N fully featured cores and M gimped cores as a CPU with N+M cores
Intel's New Chimera: Alder Lake
11–20 of 253 posts
Re: Intel's New Chimera: Alder Lake
#12I don't have an idea on CPU design. Can this lead to M1 like performance?
Re: Intel's New Chimera: Alder Lake
#13I very much don't understand why Intel didn't disable AVX-512 on the P cores, unless and until the OS writes to a new MSR that means "I understand that the P cores can do AVX-512, while the E cores cannot", and then enable AVX-512 on the P cores. Old OS versions continue to work fine, and newer OS versions can opt into the new world and benefit.
(After reading the TFA: that's what Agner says right there in the 4th paragraph.)
(After re-reading the comment: I guess that the OS changes would need to be extensive with little to no benefit: running AVX2 on all cores will likely be faster than running 2 P cores with AVX512. The only thing that is really affected is the code that could use AVX512_FP16, but I doubt there's a lot of it outside of Intel.)
Re: Intel's New Chimera: Alder Lake
#14It might reinvolve changes to DRM software but looking at the current compromises, looks like a better deal.
Of course Intel should have thought of this and didn't pick this route. I'd love to see the reasoning though.
Re: Intel's New Chimera: Alder Lake
#15Are Intel just taking it too far in terms of disparity between the architectures?
Re: Intel's New Chimera: Alder Lake
#16But maybe that's just because it's a first generation technology for Intel? I hope things improve in the future because I sure would love to have more cores available (currently rocking a 32 core Threadripper) and AMD is sure as hell not interested in actually pushing HEDT forward since they became the top dog. (I have a few grand burning a hole in my pocket waiting for a product they don't want to release.)
Re: Intel's New Chimera: Alder Lake
#17Re: Intel's New Chimera: Alder Lake
#18I wish there was at least a switch to allow the CPU to report the proper CPUID on each core and ideally, also keep AVX512 enabled. You could have a bios setting writing to an MSR. But I guess some idiot gamer somewhere might still enable this setting without understanding a word of the warning it's accompanied by and Intel wants to avoid that. But I'm hopeful this is a stop-gap solution and we'll just make the p-core…
Such a condescending comment. Why should this "idiot gamer", who might be a child, be expected to know about this stuff?
Re: Intel's New Chimera: Alder Lake
#19I wish there was at least a switch to allow the CPU to report the proper CPUID on each core and ideally, also keep AVX512 enabled. You could have a bios setting writing to an MSR. But I guess some idiot gamer somewhere might still enable this setting without understanding a word of the warning it's accompanied by and Intel wants to avoid that. But I'm hopeful this is a stop-gap solution and we'll just make the p-core…
Such a condescending comment. Why should this "idiot gamer", who might be a child, be expected to know about this stuff?
Re: Intel's New Chimera: Alder Lake
#20I very much don't understand why Intel didn't disable AVX-512 on the P cores, unless and until the OS writes to a new MSR that means "I understand that the P cores can do AVX-512, while the E cores cannot", and then enable AVX-512 on the P cores. Old OS versions continue to work fine, and newer OS versions can opt into the new world and benefit.