Single-chip processors have reached their limits • Hacker News Board

Re: Single-chip processors have reached their limits

#151

Post by xyzzy21 » Tue, Apr 05, 2022, 8:28 PM UTC

bob1029 wrote: post #67

Despite the limitations apparently present in single chip/CPU systems, they can still provide an insane amount of performance if used properly. There are also many problems that are literally impossible to make faster or more correct than by simply running them on a single thread/processor/core/etc. There always will be forever and ever. This is not a "we lack the innovation" problem. It's an information-theoretic /…

Good Coding is still in major deficit these days so absolutely true.

Going back to "coding intensity" that used to be common in 8-bit processors to overcome bloatware is still open territory. One may themselves code with libraries efficiently but the libraries are very seldom very efficient.

This is still one of the better ways of "extending Moore's Law" - stop bloating code.

Architecture innovation is another.

Chiplets is probably the best physical/electronics way right now to continue the status quo of laziness.

Re: Single-chip processors have reached their limits

#152

Post by astrange » Wed, Apr 06, 2022, 12:25 AM UTC

gotaquestion wrote: post #144

astrange wrote: post #134

Earlier quoted context omitted.

M1 is an AMP design, as is every iPhone SoC. It works well although you’ll be surprised if you try to run an SMP workload on every single core.

Yes, I actually said this in my original post: Arm BIG.little works, which is what M1 is, and embedded works well, which are SoCs. It is much more difficult in AMP systems that aren't necessary only the same die, like automotive Tier 1 products.

Hmm, I thought big.LITTLE implied that only one of the cores was active at once and all the tasks migrated from one to the other. M1 doesn't do that, all cores can be on all the time and they just start on one of them depending on priority.

Why does it have such a horrible name?

Re: Single-chip processors have reached their limits

#153

Post by EricE » Wed, Apr 06, 2022, 1:55 AM UTC

CamouflagedKiwi wrote: post #130

nine_k wrote: post #30

Earlier quoted context omitted.

I think this is already implemented both in Linux and in Windows; you can tell the OS which RAM ranges are defective. Doing this from the chip side is not there yet, apparently. I wonder when will this be included in the DRAM feature list, if ever. I suspect that detecting defects from the RAM side is not trivial.

Yep, my last PC developed a defect in one of the RAM modules. Finding it using memtest86 was trivial; easier than figuring out exactly how to tell Windows what to do about it... Of course it did take a little bit of a hunch to go from "the game I'm playing crashes at this point" to "maybe my RAM is defective". I suppose ECC would help spot this.

Spot and correct it too :)

Re: Single-chip processors have reached their limits

#154

Post by mbrodersen » Wed, Apr 06, 2022, 2:24 AM UTC

retrac wrote: post #6

The best chiplet interconnect may turn out to be no interconnect at all. Wafer scale integration [1] has come up periodically over the years. In short, just make a physically larger integrated circuit, potentially as large as the entire wafer -- like a foot across. As I understand it, there's no particular technical hurdle, and indeed the progress with self-healing and self-testing designs with redundancy to improve…

The problem is cost. Instead of getting N CPU’s per wafer you are now getting just 1 mega-CPU. So you need to sell the mega-CPU at N times the price to get the same ROI. So a solution for super computer applications. Not for everybody else.

Re: Single-chip processors have reached their limits

#155

Post by fulafel » Wed, Apr 06, 2022, 4:35 AM UTC

hinkley wrote: post #55

I hope we are going to get back to a more asymmetric multi-processing arrangement in the near term where we abandon the fiction of a processor or two running the whole show with peripheral systems that have as little smarts as possible and promote them to at least second class citizens. These systems are much more powerful than when these abstractions were laid down, and at this point it feels like the difference bet…

Considering how seemingly impossible it has been to get GPUs and SIMD units accessible enough for programmers, I don't think we're ready for more until compiler technology and languages mature significantly.

Re: Single-chip processors have reached their limits

#156

Post by ladyattis » Wed, Apr 06, 2022, 1:31 PM UTC

I wonder if this will finally restart any research into non-Von Neumann architecture even for commercial uses like workstations and servers.

Re: Single-chip processors have reached their limits

#157

Post by sliken » Wed, Apr 06, 2022, 3:30 PM UTC

paulmd wrote: post #149

sliken wrote: post #148

Earlier quoted context omitted.

"They literally only gimped the memory bandwidth". As I mentioned looks like all the less than 8 chiplet Epycs in the current Zen3/Milan generation look like they have the full memory bandwidth.

No need to get defensive (on behalf of a multibillion-dollar corporation), I'm just more curious about how exactly they did the quad-channel SKUs in Rome.

Heh, didn't think it was defensive.

The 2nd gen epycs did have chips with reduced memory bandwidth, the 3rd gen didn't. I believe the posted URL from servethehome has a pretty good explanation. My theory is that the 2nd gen Epycs had a bottleneck in the chiplet uplink connections, so that 4 chiplets couldn't manage the full bandwidth. So maybe the 3rd gen increased those links so even 4 chiplets could still handle 100% of the available memory bandwidth.

It does boggle my mine that a $2k apple desktop has 400GB/sec of memory bandwidth and that a $4k apple desktop has 800GB/sec of memory bandwidth.

Re: Single-chip processors have reached their limits

#158

Post by Brian_K_White » Fri, Apr 08, 2022, 2:31 AM UTC

paulmd wrote: post #52

AceJohnny2 wrote: post #14

Earlier quoted context omitted.

To clarify and contextualize a bit what you're saying: The one big obstacle in creating larger chips is defects. There's just a statistical chance of there being a defect on any given surface area of the wafer, defect which generally breaks the chip that occupies that area of the wafer. So historically, the approach was to make more smaller chips and trash those chips on the wafer affected by defects. Then came the "…

> changes in the way chips are designed can make them resilient to defects, so you no longer need to trash that chip on your wafer that's affected by such a defect, no, it's basically "chiplets but you don't cut the chiplets apart". You design the chiplets to be nodes in a mesh interconnect, and failed chiplets can simply be disabled entirely and then routed around. But they're still "chiplets" that have their own fu…

"there's nothing about "changes in the way the chips are designed that makes them more resilient to defects"

Of course there is. Scarequotes invalid.

Ever since the first first pal/gal/cpld/fpga-like device, the essence of malleable silicon has existed, and has been incorporated into things more and more over time.

It's 40 year old stuff by now.

Re: Single-chip processors have reached their limits

#159

Post by hadlock » Thu, Apr 14, 2022, 2:41 PM UTC

candiddevmike wrote: post #23

AceJohnny2 wrote: post #14

Earlier quoted context omitted.

To clarify and contextualize a bit what you're saying: The one big obstacle in creating larger chips is defects. There's just a statistical chance of there being a defect on any given surface area of the wafer, defect which generally breaks the chip that occupies that area of the wafer. So historically, the approach was to make more smaller chips and trash those chips on the wafer affected by defects. Then came the "…

Wikipedia link on microlithography if you want a rabbit hole about wafer making: https://wikipedia.org/wiki/Microlithography Being able to print something in nanometers is an overlooked technical achievement for human manufacturing.

This is briefly touched upon in Neal Stephenson's "Seveneves", after The Cataclysm happens humanity regrows most technology, but for the most part ICs are limited to 8086-level devices as even thousands of years later they are unable to reach the level of semiconductor technology before it. The amount of technology and power in something as small as a cell phone or lowly raspberry pi is nothing short of a marvel, particularly at their price points.