Live data from Hacker News

Lanai, the mystery CPU architecture in LLVM

q3k.org

61–70 of 163 posts

Re: Lanai, the mystery CPU architecture in LLVM

#61
post #4

I worked for Myricom 2001->2013, and Google 2013->2015. And, wow, I wish I could comment on this thread.. :) EDIT: Scott's Medium blog post linked from this article is fascinating: https://medium.com/swlh/myricom-an-hpc-story-and-lessons-lea...

When does the NDA expire? 7 years is a long time.

Re: Lanai, the mystery CPU architecture in LLVM

#62
post #4

I worked for Myricom 2001->2013, and Google 2013->2015. And, wow, I wish I could comment on this thread.. :) EDIT: Scott's Medium blog post linked from this article is fascinating: https://medium.com/swlh/myricom-an-hpc-story-and-lessons-lea...

Plot twist: you were the CEO.

Re: Lanai, the mystery CPU architecture in LLVM

#63
post #37

Random, tangentially related thing I just remembered: FreeBSD used to provide its own firmware for (iirc MIPS-like) core used in very early Broadcom NICs. There also used to be a custom firmware for some Adaptec controllers, along with an assembler tool to compile it during kernel build.

I think you're talking about the Alteon Tigon-II NICs (Alteon was acquired by Broadcom). Ken Merry and I modified Alteon firmware so that it supported zero-copy sockets by doing page-flipping on receive.

See https://people.freebsd.org/~ken/zero_copy/

Re: Lanai, the mystery CPU architecture in LLVM

#64
Lanai …. Sounded familiar, of course myri. I used these NICs to implement wire speed 10g packet capture. They were a fraction of the cost of dedicated packet capture boards and had a nice api.

These days I guess a Risc-v would be a perfect match for this sort of application, but back then it seemed every accelerator startup would implement a custom ISA.

Re: Lanai, the mystery CPU architecture in LLVM

#65
post #4

I worked for Myricom 2001->2013, and Google 2013->2015. And, wow, I wish I could comment on this thread.. :) EDIT: Scott's Medium blog post linked from this article is fascinating: https://medium.com/swlh/myricom-an-hpc-story-and-lessons-lea...

I just want to know why it needs to be in-tree.

Some important/big customer pays a maintainer to maintain it upstream instead of having to maintain/port it in-house. If there's two of these, it makes sense. Even with one it would otherwise require backporting. Might as well do it in public?

Re: Lanai, the mystery CPU architecture in LLVM

#66
post #4

I worked for Myricom 2001->2013, and Google 2013->2015. And, wow, I wish I could comment on this thread.. :) EDIT: Scott's Medium blog post linked from this article is fascinating: https://medium.com/swlh/myricom-an-hpc-story-and-lessons-lea...

> The moral of the story is simple, expect that in a small start-up your stock will NEVER be worth anything, and get what you can in your normal paycheck.

That's an important moral.

I wish someone had told me that back then.

Re: Lanai, the mystery CPU architecture in LLVM

#67
post #43

Earlier quoted context omitted.

This line in that post is mystifying: they peddled Infiniband, an inferior design based on bus technology, but repositioned as a point to point network

I think that's a confusing reference to the fact that InfiniBand initially was supposed to be also a replacement for system-internal buses (i.e. a PCI replacement), before PCIe took that place instead.

I wasn't there, but understood it was intended for general machine-room -- I dislike "datacentres" -- use; Wikipedia implies it was intended for ~everything...

Anyway, IB at least had lower latency than Myrinet, which is what counts in a lot of HPC. I don't remember the numbers, but I got quite close to Myrinet latency with the on-board 1GbE NICs on Sun x2200s, an un-managed switch, and Open-MX, which was interoperable with the Myrinet MX protocol. (I remember MX being slagged off by Mellanox; I don't know how similar MXM later was for IB.)

Re: Lanai, the mystery CPU architecture in LLVM

#68
post #4

I worked for Myricom 2001->2013, and Google 2013->2015. And, wow, I wish I could comment on this thread.. :) EDIT: Scott's Medium blog post linked from this article is fascinating: https://medium.com/swlh/myricom-an-hpc-story-and-lessons-lea...

Interesting - I had never heard of Myricom. I have used Infiniband quite a bit in budget super high performance applications - the old hardware can sometimes be found quite cheaply compared to 40gig/100gig ethernet (or it was at least a few years ago). Much more fiddly to get working but the performance was impressive once it did.

For what it's worth, I've had rather more trouble with Ethernet than IB, especially given IB management facilities.

Re: Lanai, the mystery CPU architecture in LLVM

#69
post #48

Earlier quoted context omitted.

You can use a bus PHY in a p2p configuration.

But Infiniband didn't do that.

you can do point-to-point connections with infiniband, it's a pretty common homelab use-case since adapters are so cheap these days.

Re: Lanai, the mystery CPU architecture in LLVM

#70
post #69
post #48

Earlier quoted context omitted.

But Infiniband didn't do that.

you can do point-to-point connections with infiniband, it's a pretty common homelab use-case since adapters are so cheap these days.

InfiniBand is always point-to-point, that's the point. The talk about "bus" is confusing/wrong since it never is a bus.
Post reply on HN