I worked for Myricom 2001->2013, and Google 2013->2015. And, wow, I wish I could comment on this thread.. :) EDIT: Scott's Medium blog post linked from this article is fascinating: https://medium.com/swlh/myricom-an-hpc-story-and-lessons-lea...
Lanai, the mystery CPU architecture in LLVM
61–70 of 163 posts
Re: Lanai, the mystery CPU architecture in LLVM
#62I worked for Myricom 2001->2013, and Google 2013->2015. And, wow, I wish I could comment on this thread.. :) EDIT: Scott's Medium blog post linked from this article is fascinating: https://medium.com/swlh/myricom-an-hpc-story-and-lessons-lea...
Re: Lanai, the mystery CPU architecture in LLVM
#63Random, tangentially related thing I just remembered: FreeBSD used to provide its own firmware for (iirc MIPS-like) core used in very early Broadcom NICs. There also used to be a custom firmware for some Adaptec controllers, along with an assembler tool to compile it during kernel build.
Re: Lanai, the mystery CPU architecture in LLVM
#64These days I guess a Risc-v would be a perfect match for this sort of application, but back then it seemed every accelerator startup would implement a custom ISA.
Re: Lanai, the mystery CPU architecture in LLVM
#65I worked for Myricom 2001->2013, and Google 2013->2015. And, wow, I wish I could comment on this thread.. :) EDIT: Scott's Medium blog post linked from this article is fascinating: https://medium.com/swlh/myricom-an-hpc-story-and-lessons-lea...
I just want to know why it needs to be in-tree.
Re: Lanai, the mystery CPU architecture in LLVM
#66I worked for Myricom 2001->2013, and Google 2013->2015. And, wow, I wish I could comment on this thread.. :) EDIT: Scott's Medium blog post linked from this article is fascinating: https://medium.com/swlh/myricom-an-hpc-story-and-lessons-lea...
That's an important moral.
I wish someone had told me that back then.
Re: Lanai, the mystery CPU architecture in LLVM
#67Earlier quoted context omitted.
This line in that post is mystifying: they peddled Infiniband, an inferior design based on bus technology, but repositioned as a point to point network
I think that's a confusing reference to the fact that InfiniBand initially was supposed to be also a replacement for system-internal buses (i.e. a PCI replacement), before PCIe took that place instead.
Anyway, IB at least had lower latency than Myrinet, which is what counts in a lot of HPC. I don't remember the numbers, but I got quite close to Myrinet latency with the on-board 1GbE NICs on Sun x2200s, an un-managed switch, and Open-MX, which was interoperable with the Myrinet MX protocol. (I remember MX being slagged off by Mellanox; I don't know how similar MXM later was for IB.)
Re: Lanai, the mystery CPU architecture in LLVM
#68I worked for Myricom 2001->2013, and Google 2013->2015. And, wow, I wish I could comment on this thread.. :) EDIT: Scott's Medium blog post linked from this article is fascinating: https://medium.com/swlh/myricom-an-hpc-story-and-lessons-lea...
Interesting - I had never heard of Myricom. I have used Infiniband quite a bit in budget super high performance applications - the old hardware can sometimes be found quite cheaply compared to 40gig/100gig ethernet (or it was at least a few years ago). Much more fiddly to get working but the performance was impressive once it did.
Re: Lanai, the mystery CPU architecture in LLVM
#69Re: Lanai, the mystery CPU architecture in LLVM
#70Earlier quoted context omitted.
But Infiniband didn't do that.
you can do point-to-point connections with infiniband, it's a pretty common homelab use-case since adapters are so cheap these days.