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Apple’s A14 Packs 134M Transistors/mm²

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Re: Apple’s A14 Packs 134M Transistors/mm²

#121

Post by saagarjha »

djxfade wrote: post #108
saagarjha wrote: post #95

Earlier quoted context omitted.

I work on a x86 interpreter that is only usable because of Apple's massive investment into these chips over the last couple years. I doubt that is what Apple was designing them for, but they are very useful to have as an application developer.

Are you the developer of iSH by any chance? If so, very cool project. Was it hard to get it published in the App Store?

I am a developer of iSH; tbodt did most of the interpreter work though. (Actually, he did most of the work on the app in general–there's a couple more of us who dabble in other parts of development, as well as support, marketing, compliance.) We're glad you like the project :)

Getting iSH on the App Store did take some work on our side; we were in contact with Apple to get it approved and in compliance with the guidelines. You may have seen that the version of iSH on the App Store had package management functionality removed. So far we've been able to keep the ability to run Linux programs, as well as import files, unchanged.

One interesting thing to see from Apple is that they are not just increasing the performance of their chips, but they are investing heavily in making certain operations faster. For example, in the time since tbodt started working iSH Apple has reduced the cost of uncontended atomics to almost zero overhead (this is especially good for Apple because it immediately makes reference counting code faster, which both Swift and Objective-C spend a lot of time in). iSH doesn't currently do anything fancy there, it just uses full locks everywhere, so this is something that we would be interested in pursuing at some point.

Re: Apple’s A14 Packs 134M Transistors/mm²

#122

Post by saagarjha »

lunixbochs wrote: post #100
urthor wrote: post #86

Earlier quoted context omitted.

Basically, no. The issue was never the instruction set, you still have to support the interface and the OS which nobody is bothered to do because cost benefit. Changing the chip isn't going to change the code base of the operating system.

Unless they specifically opt out, almost all iOS apps will be available on Apple Silicon macs at launch.

It will probably run, but I wonder if the UI will be usable on macOS?

Re: Apple’s A14 Packs 134M Transistors/mm²

#123

Post by FullyFunctional »

my123 wrote: post #94
FullyFunctional wrote: post #31

Earlier quoted context omitted.

I'm not sure you are serious, but eDRAM isn't a direct replacement for SRAM. At best it's useful for L3 or L4 cache given the inherently higher latencies. I think we just have to accept that silicon scaling is slowing down.

On the recent IBM z processors, eDRAM is used even for the L1 chip. And that's above 5GHz.

Thanks, I stand corrected!

Isn't eDRAM an IBM-only technology?

Re: Apple’s A14 Packs 134M Transistors/mm²

#124

Post by tshaddox »

Godel_unicode wrote: post #54
jiggawatts wrote: post #32

Earlier quoted context omitted.

I was just looking into optimising a large web application. I told the customer that using a caching layer such as a CDN would help paper over the worst of the inefficiencies in their application and the network stack. That was true! The download times halved. However, benchmarks with F12 developer tools showed that while downloads reduced from 200ms to 100ms, the overall load times were still seconds, of which about…

Sounds like the argument here is "buy an iPad pro so frontend developers don't need to learn optimization"...?

Not any more than that all improvements to computer performance serve no purpose but to allow developers to skip optimization.

Re: Apple’s A14 Packs 134M Transistors/mm²

#125

Post by Someone »

asdfasgasdgasdg wrote: post #44
topspin wrote: post #42

Earlier quoted context omitted.

> If that follows Efficiency, performance and cost are strongly related to density. Price less so; that's a function of supply and demand.

> Efficiency, performance and cost are strongly related to density. Price less so; that's a function of supply and demand. They are related, of course, but the important stuff can be measured more directly by looking at how well programs work on a given computer. I think it's just a little odd to praise one cherry-picked, arbitrary metric for being less game-able than another cherry-picked, arbitrary metric. Especial…

That magazines, sites and fans started using density for bragging rights, just as they used to do with MHz, certainly isn’t fully the fault of manufacturers.

Manufacturers use “x nm”, yield (a metric correlated with price, but also completely uninteresting for consumers), etc. because they tell chip designers what they need to know.

They avoid benchmark scores because they bring the CPU design in the picture as a variable.

Re: Apple’s A14 Packs 134M Transistors/mm²

#126

Post by FPGAhacker »

ChuckMcM wrote: post #114
thornjm wrote: post #110

Earlier quoted context omitted.

The column is explicitly labelled "effective vs theoretical" though. There is nothing misleading there.

This is where I believe the author goes astray: "Despite TSMC claiming a 1.8x shrink for N5, Apple only achieves a 1.49x shrink." TSMC does NOT say they have a 1.8x shrink for N5, they say for LOGIC you can get that, but for SRAM and Analog the results are 1.35x and 1.2x. Had they summed that together for a "typical SOC", which they also discuss (and one presumes that Apple makes typical SOCs) then the "theoretical"…

Wait, when node sizes where based off of a gate that meant logic gate? I always thought it was the transistor gate width.

Re: Apple’s A14 Packs 134M Transistors/mm²

#127

Post by dev_tty01 »

kilburn wrote: post #107
desiarnezjr wrote: post #93

Earlier quoted context omitted.

And the problem there is? Any one of those companies are all long term TSMC customers and I have no doubt have solid working relationships with them. They would have had similar opportunity to book that fab capacity too.

The problem is the assertion that "It's Apple's engineering and design". Engineering & design don't buy you the entire world's supply of the best in class fab capacity for some months: money does. It seems to me apple's marketing and product strategy has more to do with bringing in that money than actual engineering and design, contradicting the original assertion.

Apple's engineering and design success is a huge part of why they have the resources to likely fund some of the 5 nm fab deployment costs and capacity. Money comes from success which came from great engineering and design coupled with great marketing.

Marketing might get you there for a short time, but maintaining that growth and long term high customer satisfaction doesn't come without great engineering and design.

Re: Apple’s A14 Packs 134M Transistors/mm²

#128

Post by dodobirdlord »

kilburn wrote: post #107
desiarnezjr wrote: post #93

Earlier quoted context omitted.

And the problem there is? Any one of those companies are all long term TSMC customers and I have no doubt have solid working relationships with them. They would have had similar opportunity to book that fab capacity too.

The problem is the assertion that "It's Apple's engineering and design". Engineering & design don't buy you the entire world's supply of the best in class fab capacity for some months: money does. It seems to me apple's marketing and product strategy has more to do with bringing in that money than actual engineering and design, contradicting the original assertion.

Apple wouldn't have shelled out the money to have first crack at 5nm if their design team couldn't commit to having a CPU design done in time. It's a huge R&D achievement to have such a complex design ready to go on a new node as the node launches. It speaks to extremely tight timelines and extremely close collaboration between TSMC and Apple.

Re: Apple’s A14 Packs 134M Transistors/mm²

#129

Post by dodobirdlord »

phkahler wrote: post #92
mucle6 wrote: post #78

Earlier quoted context omitted.

Buy an iPad pro because time and time again we have seen that optimizing is not a priority for the majority of business. I think the cynicism here is that if only these frontend developers would just learn to optimize we would all finally be better off. I think there are two factors that push against this though. First, if you learn to optimize then you can charge more for your labor, and you will likely get a job so…

>> Second, companies exist for profit, and optimizing is not often the most profitable next step. That's true and reasonable. And after this 5nm node, TSMC has 3nm and IIRC 2nm. We are at the point where throwing more hardware at slow software is becoming a non solution. The good news is that in many cases there is a LOT of performance on the table on the software side.

The node size numbers have been made up for decades. Even if process shrinks bottom out two or three node shrinks from now there will still be improvements in process, materials, thermals, and packaging to allow things like greater z-axis stacking. And there's a ton of room for targeted improvement in things like vector instructions.

That's not to say that there isn't an enormous amount of improvement available in software. Projects like simdjson prove that there's a 2x or more improvement available for many high-performance use cases by migrating to vector instructions.

https://github.com/simdjson/simdjson

Re: Apple’s A14 Packs 134M Transistors/mm²

#130

Post by websg-x »

DiabloD3 wrote: post #120
ChuckMcM wrote: post #111

Earlier quoted context omitted.

I was referring to this: https://www.anandtech.com/show/15538/samsung-starts-mass-pro... Which has Samsung in production of their 7nm node this year as well.

Samsung's process seems to be consistently DOA.... by the time it is stabilized, its already behind everyone else. Consequently, almost all of Nvidia's current troubles stem from being unable to do all of their fabrication at TSMC, and the yields for Samsung 8nm being very poor. Nvidia recently canceled the 2x RAM variants of their 3070 and 3080 cards (and not because of insufficient GDDR6x, only the 3090 takes that)…

3080 use GDDR6x. Yes, the 20gb 3080 is cancelled, but there is a new rumor about 12gb 3080ti. So maybe GDDR6x scarcity is the culprit, not Samsung's process.
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