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TSMC to Mass Produce Breakthrough 2nm Mbcfet Transistors in 2024

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Re: TSMC to Mass Produce Breakthrough 2nm Mbcfet Transistors in 2024

#21

Post by vmception »

vkou wrote: post #16
jmt_ wrote: post #13

Can someone ELI5 how TSMC is able to produce sub-7nm chips? I know quantum tunneling and the like becomes an issue at this size. I don't have a great physics background so I'm struggling to find a simple enough explanation for how they are dealing with this. Is it not as big a deal as I may think?

It's easy. You take a very small number, add the letters 'nm' to it, and then start sending out press-releases to the major media outlets. That number has nearly zero bearing on the actual physical sizes of the chip's components. The only people who know about the exact dimensions are the firms placing manufacturing contracts with TSMC.

You get it

Re: TSMC to Mass Produce Breakthrough 2nm Mbcfet Transistors in 2024

#22

Post by reducesuffering »

hinkley wrote: post #19
derision wrote: post #11

Earlier quoted context omitted.

Intel is more like 3 steps behind, one of their shoes is missing and the other is missing laces

Having lived inside similar but much smaller dramas, it smells to me like Intel is titrating bad news. There was a goal. The goal became PR. Someone in management began to believe the PR, and turned it into a promise, predicated on 'and then a miracle occurs' (the engineers figure out how to do some things that haven't been done before). The engineers keep trying to explain how nobody has done this before because you…

This exact scenario is parodied in the show Silicon Valley[0]

It's probably fairly commonplace.

[0] https://www.youtube.com/watch?v=QZ7m7mV864A

Re: TSMC to Mass Produce Breakthrough 2nm Mbcfet Transistors in 2024

#23

Post by tux3 »

nicoburns wrote: post #20
jmt_ wrote: post #13

Can someone ELI5 how TSMC is able to produce sub-7nm chips? I know quantum tunneling and the like becomes an issue at this size. I don't have a great physics background so I'm struggling to find a simple enough explanation for how they are dealing with this. Is it not as big a deal as I may think?

To make an analogy: I think a good way to think about it is that the 7nm node doesn't actually produce chips with 7nm features, it uses a "knife" (actually it's a lithography process) which is able to cut things as small as 7nm . That enables it to be more precise than a bigger "knife" so even though the size of the chip features is >7nm they are still able to be smaller than features cut with a 10nm "knife". I don't…

One thing people are trying to convery every time this question comes up is that "7nm" is really just a marketing number, it's not tied to any particular physical dimension, and it's not how small the knife is able to cut.

The knife does get better, it's just not something that the Xnm node names measure directly.

Re: TSMC to Mass Produce Breakthrough 2nm Mbcfet Transistors in 2024

#24

Post by marcosdumay »

nicoburns wrote: post #20
jmt_ wrote: post #13

Can someone ELI5 how TSMC is able to produce sub-7nm chips? I know quantum tunneling and the like becomes an issue at this size. I don't have a great physics background so I'm struggling to find a simple enough explanation for how they are dealing with this. Is it not as big a deal as I may think?

To make an analogy: I think a good way to think about it is that the 7nm node doesn't actually produce chips with 7nm features, it uses a "knife" (actually it's a lithography process) which is able to cut things as small as 7nm . That enables it to be more precise than a bigger "knife" so even though the size of the chip features is >7nm they are still able to be smaller than features cut with a 10nm "knife". I don't…

That's kinda the idea. There are also several different layers each with its own resolution.

Also, well, that number isn't really the actual resolution of the finest layer, but is some "marketing processed" message that should give you an idea of the chips performance. It used to have the meaning you stated, but things changed a while ago.

Re: TSMC to Mass Produce Breakthrough 2nm Mbcfet Transistors in 2024

#25

Post by Nokinside »

jmt_ wrote: post #13

Can someone ELI5 how TSMC is able to produce sub-7nm chips? I know quantum tunneling and the like becomes an issue at this size. I don't have a great physics background so I'm struggling to find a simple enough explanation for how they are dealing with this. Is it not as big a deal as I may think?

The number 7nm 5nm etc. ceased to refer anything physical after the technology moved on from planar transistors. Now it's just a commercial name for a generation.

The most important dimensions are the gate pitch and metal pitch. For TSMC's 7nm process they are something like 60 and 40 nm and go down in the future to something like 30 nm and 20 nm in the 2nm process. Fin width might be the closest thing to commercial name.

They are not even comparable across companies. For example, TSMC 7nm process technology has 91 MTr/mm², Intel's 10 nm prosess technology has 100 MTr/mm². Samsung 10nm has 52 MTr/mm². (MTr/mm² refers to millions of transistors per mm²).

Re: TSMC to Mass Produce Breakthrough 2nm Mbcfet Transistors in 2024

#26

Post by marcosdumay »

throwaway4good wrote: post #5
vbezhenar wrote: post #4

Earlier quoted context omitted.

I think it depends on price. At some point chips will cost too much for consumer electronics. You wouldn't want to buy iPhone with $1000 CPU.

A mass volume product like an iPhone is the only thing that generates enough money to sponsor this form of development.

Yes, fabs take a large amount of risk when they develop new processes.

That doesn't mean that Apple is interested. At least right now. Processes also tend to be improved with time.

Re: TSMC to Mass Produce Breakthrough 2nm Mbcfet Transistors in 2024

#27

Post by swiley »

Nokinside wrote: post #25
jmt_ wrote: post #13

Can someone ELI5 how TSMC is able to produce sub-7nm chips? I know quantum tunneling and the like becomes an issue at this size. I don't have a great physics background so I'm struggling to find a simple enough explanation for how they are dealing with this. Is it not as big a deal as I may think?

The number 7nm 5nm etc. ceased to refer anything physical after the technology moved on from planar transistors. Now it's just a commercial name for a generation. The most important dimensions are the gate pitch and metal pitch. For TSMC's 7nm process they are something like 60 and 40 nm and go down in the future to something like 30 nm and 20 nm in the 2nm process. Fin width might be the closest thing to commercial…

That's interesting, I saw a hobbyist photo lithography setup the other year that was able to etch metal with a resolution of 20nm.

Re: TSMC to Mass Produce Breakthrough 2nm Mbcfet Transistors in 2024

#28

Post by robert_dipaolo »

jmt_ wrote: post #13

Can someone ELI5 how TSMC is able to produce sub-7nm chips? I know quantum tunneling and the like becomes an issue at this size. I don't have a great physics background so I'm struggling to find a simple enough explanation for how they are dealing with this. Is it not as big a deal as I may think?

der8auer recently did a 3 part video on YouTube where he cut up AMD and Intel chips and looked at the transistors with an electron microscope. It sheads some light on meaning (or non-meaning) of the node names. Is also really interesting;

https://youtu.be/uEMDkbF3hu0 https://youtu.be/uXu_1zXOZdY https://youtu.be/_wAeL3f3iV4

Re: TSMC to Mass Produce Breakthrough 2nm Mbcfet Transistors in 2024

#29

Post by hinkley »

reducesuffering wrote: post #22
hinkley wrote: post #19

Earlier quoted context omitted.

Having lived inside similar but much smaller dramas, it smells to me like Intel is titrating bad news. There was a goal. The goal became PR. Someone in management began to believe the PR, and turned it into a promise, predicated on 'and then a miracle occurs' (the engineers figure out how to do some things that haven't been done before). The engineers keep trying to explain how nobody has done this before because you…

This exact scenario is parodied in the show Silicon Valley[0] It's probably fairly commonplace. [0] https://www.youtube.com/watch?v=QZ7m7mV864A

I can never decide if Mike Judge is really this good, or we are really this transparent that a mostly-outsider can peg us so accurately.

Re: TSMC to Mass Produce Breakthrough 2nm Mbcfet Transistors in 2024

#30

Post by tiffanyh »

Nokinside wrote: post #25
jmt_ wrote: post #13

Can someone ELI5 how TSMC is able to produce sub-7nm chips? I know quantum tunneling and the like becomes an issue at this size. I don't have a great physics background so I'm struggling to find a simple enough explanation for how they are dealing with this. Is it not as big a deal as I may think?

The number 7nm 5nm etc. ceased to refer anything physical after the technology moved on from planar transistors. Now it's just a commercial name for a generation. The most important dimensions are the gate pitch and metal pitch. For TSMC's 7nm process they are something like 60 and 40 nm and go down in the future to something like 30 nm and 20 nm in the 2nm process. Fin width might be the closest thing to commercial…

What's the MTr/mm2 for TSMC 5nm? 2nm?

EDIT: looks like 173M for 5nm. https://en.m.wikipedia.org/wiki/5_nm_process

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