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Google offers free fabbing for 130nm open-source chips

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Re: Google offers free fabbing for 130nm open-source chips

#281

Post by moftz »

DCKing wrote: post #31

From a hobbyist and preservation perspective, it would be cool if this could be used to produce some form of the Apollo 68080 core to revive the 68k architecture a little bit, and build out the Debian m68k port [0][1]. The last "big" 68k chips were produced in 1995 (that would be a 350nm process?) so this could be hugely improved on 130nm. The 68080 core is currently implemented in FPGAs only and is already the faste…

The PowerPC 7457 was built on a 130nm process, used in the AmigaOne XE as well as the Apple G4 machines. That's probably about as good as you will get for an community-led chip fabrication. You could probably get it up to over 1GHz if you made a 68k at this size. A modern FPGA is probably the better way to go for this kind of thing. I doubt this free fab includes things like die testing and packaging. That's an expensive process so someone would need to front some money to actually get the testing and packaging done for enough chips to make the cost actually worth it. It would be much cheaper to design an interposer board that could plug into a motherboard to take the place of the original 68k. This would also allow you to continuously upgrade the processor without requiring a whole new fab to take place.

Re: Google offers free fabbing for 130nm open-source chips

#282

Post by dekhn »

ascorbic wrote: post #260
dekhn wrote: post #150

Earlier quoted context omitted.

Yes, you can build dedicated ASICs. No, it's not worth it for docking software.

According to Wikipedia there has been some success building FPGAs for Autodock, so maybe it could be. https://en.m.wikipedia.org/wiki/AutoDock

yes but since drug discovery isn't bottlenecked by virtual docking throughput, it doesn't matter.

We've seen similar approaches applied to BLAST, and in the end, everybody ends up giving up the ASIC or the FPGA because it's not cost effective long-term.

Re: Google offers free fabbing for 130nm open-source chips

#283

Post by riking »

yjftsjthsd-h wrote: post #181
dooglius wrote: post #160

If you wanted to do something with a hardware root-of-trust, would the GDSII leak needed secrets (i.e. any private keys could be extracted by looking at what you're required to open up), or is that done in some special post-fab way?

Could you burn in the private key using fuses?

Take a look at the Google Titan chip slides for an idea of how to implement this: https://www.hotchips.org/hc30/1conf/1.14_Google_Titan_Google... Video: https://youtu.be/ve_64dbM4YI?t=3089

Specifially, slides 35-40. You burn a feature fuse to unlock manufacturing test features. The device is personalized with a serial number + told to generate private key + record stored in database. Then, the key is locked in by burning a second feature fuse that disables any future writing to those segments.

Re: Google offers free fabbing for 130nm open-source chips

#284

Post by gentleman11 »

Simple question: aren’t you basically not allowed to make chips because of patents? Not literally forbidden, but aren’t there so many patents that you can’t really work without violating one, even if you have never heard of it or the technique before? It just sounds so hazardous

Re: Google offers free fabbing for 130nm open-source chips

#285

Post by jabl »

jecel wrote: post #200
mysterydip wrote: post #114

Would this make it possible to reproduce some historic-but-rare chips like the 4004?

This is a 0.13µm CMOS process while the 4004 was made using a 10µm PMOS technology. So the electrical characteristics would not be the same. If you don't care about that then the answer is "yes". An attempt to do something like this would have a Z80, a 6502 and a 68000 in a single chip (none of them are rare, however): https://www.crowdsupply.com/chips4makers/retro-uc

Well, the 6502 was famously NMOS which isn't CMOS either. Though wikipedia tells me there is a '65C02' which is a CMOS version of the 6502.

Re: Google offers free fabbing for 130nm open-source chips

#286

Post by namibj »

patwillson22 wrote: post #280

My advice to anyone who's looking for a pathway into open source silicon is to look into E-Beam lithography. Effectively E-Beam lithography involves using a scanning electron microscope to expose a resist on silicon. This process is normally considered to slow for industrial production but it's simplicity and size make it ideal for prototyping and photo mask production. The simplistic explanation for why this works i…

I suggest you take a look at how easy maskless photolithography is: https://sam/zeloof.xyz

Theoretically it should be feasible to fab 350 nm without double-patterning by optimizing a simple immersion DLP/DMD i-line stepper.

I think ArF immersion with double-patterning should be able to do maskless 90 nm.

Re: Google offers free fabbing for 130nm open-source chips

#287

Post by aswanson »

Taek wrote: post #151

I've spent some time in the chip industry. It is awful, backwards, and super far behind. I didn't appreciate the full power of open source until I saw an industry that operates without it. Want a linter for your project? That's going to be $50k. Also, it's an absolutely terrible linter by software standards. In software, linters combine the best ideas from thousands of engineers across dozens of companies building on…

Posts like this make me so glad I was directed by market forces out of hardware design into software.

Re: Google offers free fabbing for 130nm open-source chips

#288

Post by aswanson »

nwallin wrote: post #268
naringas wrote: post #187

Earlier quoted context omitted.

but let's not forget the non-material nature of software allows this, hardware will always be a physical (material) artifact. however the line does blur when talking about blueprints and designs. in any case, I think that free software movements are a sociological anomaly, I wonder if there is any academic research into this from an antropological or an historical economics viewpoint. also, it seems to me that in som…

> but let's not forget the non-material nature of software allows this, hardware will always be a physical (material) artifact. Sort of? I tried to get into FPGA programming a while ago, and it turns out the entire software stack to get from an idea in my brain to a blinking LED on a dev board is hot garbage. First of all, it's insanely expensive, and second of all, it really, really sucks. Like how is it (I forgot w…

Same. Started off in love w FPGA design in college. Software design is light-years ahead of that area in terms of tool maturity, functionality and freedom.

Re: Google offers free fabbing for 130nm open-source chips

#289

Post by gsmecher »

derefr wrote: post #275

So, until now, there's been this niche for FPGAs, where people would buy them in decent numbers to use with static programming, in production devices , simply because they needed some custom DSP or some-such, but the capital costs of an ASIC fab-run would be a killer for their project. Has this announcement thrown that use-case for FPGAs out the window?

The economics of FPGAs and ASICs over the past few decades are covered really well in [1]. It's almost always about production volume. The FPGA's ability to be reprogrammed is often a convenient side-effect.

In short, no, this doesn't impact the trade-offs and wouldn't even if Google provided this service as a commercial print-on-demand offering. You can get an ASIC fab'd on older nodes for surprisingly cheap, if you have the know-how and access to tools [2].

When power is a first-class design problem (it frequently is), even an "old" 28nm FPGA like Xilinx's 7 series will run rings around an 130nm ASIC. The extra silicon you're powering in the FPGA is more than offset by the economical access it gives you to modern nodes with lower voltages.

[1]: https://ieeexplore.ieee.org/document/7086413 [2]: https://spectrum.ieee.org/tech-talk/computing/hardware/lowbu...

Re: Google offers free fabbing for 130nm open-source chips

#290

Post by DesiLurker »

Taek wrote: post #151

I've spent some time in the chip industry. It is awful, backwards, and super far behind. I didn't appreciate the full power of open source until I saw an industry that operates without it. Want a linter for your project? That's going to be $50k. Also, it's an absolutely terrible linter by software standards. In software, linters combine the best ideas from thousands of engineers across dozens of companies building on…

I have thought about this at one point and have many friends in the EDA industry. I can say with conviction that you are absolutely right. If you want to imagine a parallel to software, just imagine what would have happened to open source movement if gcc did not existed. that is the first choke point in eda and then there are proprietary libraries for everything. add to this an intentionally inoptimal software designed to maximize the revenue and you get a taste of where we are at this point. IMO the best thing that can happen is some company or a consortium of fabless silicon companies buy up a underdog EDA company and just opensource everything including code/patents/bugreports. I'd bet within a few years we would have more progress than we had in last 30 years.
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