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Google offers free fabbing for 130nm open-source chips

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Re: Google offers free fabbing for 130nm open-source chips

#21

I wonder if you can make micro machines at this level? The MEMS thing. I always wondered why you needed gearing mechanisms in a micro machine. Has there ever been a practical application for gears in MEMS?

Not with this PDK or process, no. MEMS processes are quite specialised, and I beleive this project only supports digital standard cells currently, with IO and analogue/RF stuff coming out eventually (it's on the roadmap in the slides).

Re: Google offers free fabbing for 130nm open-source chips

#22
post #19

How much has the power efficiency improved between 130nm and 7nm? Is it plausible to get better performance/watt for a custom chip on 130nm vs a software application running on a 7m chip? I get that hardware has other benefits but just wondering for accelerators where the cost/benefit starts to make sense.

You won't be able to profitably mine Bitcoin on 130nm ASICs (just as an example) 130nm is almost 20 years old at this point. You can do amazing things with this process but saving power is probably not one of them.

But as an example, you WOULD be able to profitably mine bitcoin on 130nm ASICs if all the rest of the world had was CPUs/GPUs/FPGAs, which was more what the grandparent post was asking: 130nm hardware implementations can be much, much faster and/or energy efficient than a 7nm general-purpose chip which simulates the algorithm.

Re: Google offers free fabbing for 130nm open-source chips

#23
post #14

With the PDK being open, does anyone know if any kind of NDAs are still required to get a chip fabbed? While free-of-charge fabbing is quite nice, I think being NDA-free is even more important so all work including the tweaks necessary for fabbing can be published, e.g. on GitHub. BTW, it will be nice to try this together with the OpenROAD tools [1]. They have support for Google's PDK on their to-do list (planned for…

yup, NDAs destroys economic productivity.

Re: Google offers free fabbing for 130nm open-source chips

#26
post #4

That sounds pretty huge. I've never seen on Hackaday or similar people getting small runs of chip fabbed. What are the broader implications of this? Will other fabs start to lower the barrier to production as well?

Broader implications:

* More people will learn complete digital design workflow; very helpful for many students of EE/CE

* More bright ideas and experiments in robotics/IoT

* More startups

Re: Google offers free fabbing for 130nm open-source chips

#28
post #6

This is amazing. I think the main reason why open source has taken off is because access to a computer is available to many people, and as cost is negligible, it only required free time and enough dedication + skill to be successful. For hardware though, each compile/edit/run cycle costs money, software often has 5-digit per seat licenses, and thus the number of people with enough resources to pursue this as a hobby…

Sounds like there should be open source software for such a thing? I bet the software for laying out transistors and so on will suddenly become viable with something like this, good idea Google!

Re: Google offers free fabbing for 130nm open-source chips

#29

How much has the power efficiency improved between 130nm and 7nm? Is it plausible to get better performance/watt for a custom chip on 130nm vs a software application running on a 7m chip? I get that hardware has other benefits but just wondering for accelerators where the cost/benefit starts to make sense.

Depending what application you have but if you have a relatively narrow and complex application, I would say definitely yes.

Re: Google offers free fabbing for 130nm open-source chips

#30
post #19

Earlier quoted context omitted.

You won't be able to profitably mine Bitcoin on 130nm ASICs (just as an example) 130nm is almost 20 years old at this point. You can do amazing things with this process but saving power is probably not one of them.

But as an example, you WOULD be able to profitably mine bitcoin on 130nm ASICs if all the rest of the world had was CPUs/GPUs/FPGAs, which was more what the grandparent post was asking: 130nm hardware implementations can be much, much faster and/or energy efficient than a 7nm general-purpose chip which simulates the algorithm.

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