How much has the power efficiency improved between 130nm and 7nm? Is it plausible to get better performance/watt for a custom chip on 130nm vs a software application running on a 7m chip? I get that hardware has other benefits but just wondering for accelerators where the cost/benefit starts to make sense.
Google offers free fabbing for 130nm open-source chips
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Re: Google offers free fabbing for 130nm open-source chips
#12Re: Google offers free fabbing for 130nm open-source chips
#13Re: Google offers free fabbing for 130nm open-source chips
#14BTW, it will be nice to try this together with the OpenROAD tools [1]. They have support for Google's PDK on their to-do list (planned for q3, but I doubt it will be ready that fast).
[1] https://github.com/The-OpenROAD-Project https://theopenroadproject.org/
Re: Google offers free fabbing for 130nm open-source chips
#15How "bad" is that compared to standard/common 14nm, etc...
Re: Google offers free fabbing for 130nm open-source chips
#16Well done Google. But there is still problem with EDA tool license... Is there any replacement for Cadence Virtuoso tool for chip design?
As somebody with a decent amount of FPGA experience, having a go at setting this software up and seeing if I can get anything to synthesise and through place and route is something I've been intending to have a play with, but I haven't had the spare time.
It uses yosis for synthesis and a few other tools for the rest of the process, and is called Qflow - http://opencircuitdesign.com/qflow/index.html
Re: Google offers free fabbing for 130nm open-source chips
#17 - amazingly good for security.
- finally the public at large will get to understand *in details* how an ASIC is designed.Re: Google offers free fabbing for 130nm open-source chips
#18I wonder if you can make micro machines at this level? The MEMS thing. I always wondered why you needed gearing mechanisms in a micro machine. Has there ever been a practical application for gears in MEMS?
Re: Google offers free fabbing for 130nm open-source chips
#19How much has the power efficiency improved between 130nm and 7nm? Is it plausible to get better performance/watt for a custom chip on 130nm vs a software application running on a 7m chip? I get that hardware has other benefits but just wondering for accelerators where the cost/benefit starts to make sense.
130nm is almost 20 years old at this point. You can do amazing things with this process but saving power is probably not one of them.
Re: Google offers free fabbing for 130nm open-source chips
#20How "bad" is that compared to standard/common 14nm, etc...
I don't think this program is meant or likely to produce high frequency 100mm2+ chips (and it's worth remembering those chips had a lot of engineering effort put in them outside of manufacturing process) but it should permit chips of somewhat decent performance. It's a very generous thing!