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Darpa invests $100M in a silicon compiler

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Re: Darpa invests $100M in a silicon compiler

#201

Earlier quoted context omitted.

Guns and bombs are cheap. The Zumwalt, F-35, B-2, and more are not cheap. I would point out that “smart” bombs and cruise missiles are not cheap, and the cost really starts to add up. Nuclear weapons research, production, and maintenance isn’t cheap. So really it’s fair to say that guns and bombs aren’t cheap, but they are also a distraction from the delivery systems, which are catastrophically expensive. the point i…

>The Zumwalt, F-35, B-2, and more are not cheap. You're right, they sure aren't. But as a result no other military force on earth besides NATO has the capability to launch air superiority fighters from amphibious assault ships, and perform multi-ton circumglobal bombing sorties. That kind of capability doesn't come cheap, and shouldn't be dismissed. Take away the B2 and we are fighting to-to-toe with Russian/Chinese…

how exactly do modern day bombers go "toe to toe"? do you send one into the other to crash into it?

Surely all you want to do is shoot them down. Bombers are purely offensive weapons. No one needs them unless they plan to attack somewhere else

Re: Darpa invests $100M in a silicon compiler

#202

Earlier quoted context omitted.

It's not just the EDA industry, it's almost all of hardware including most of the embedded software people. Yeah, I get it - I too am sometimes stuck using some old proprietary compiler with a C standard older than some of the people I work with - but come on. On my last job I used a Qualcomm radio and they ended up giving me close to a thousand zip files of driver revisions going back a decade because their build pr…

> the backoffice engineers would make a build that fixed only those bugs Makes perfect business sense! Those customers didn't pay to get those bugs fixed, so why should they get the fixes??? /s Holy moly.

This decision was likely not made to rip-off some more moneys, but because of bad quality. If any bugfix might as well introduce two new issues, you don't deliver the fix if it isn't needed. The whole "if it ain't broke, don't fix it" saying has some of its roots in that environment, maybe even all.

This approach is wrong on many levels, but fixing the real cause is often a bit more work than "a hundred junior dev hours". In the meantime, you have to deliver to customers.

Re: Darpa invests $100M in a silicon compiler

#204

Earlier quoted context omitted.

> If AMD open sourced all the design aspects of their chips, I would have to get a loan to build 100 million fab to have any practical manner to enjoy it? Try $1 to 5 billion. We're talking about something that over half of all extant nation states wouldn't be able to pull off without devoting 10-50% of their annual GDP to the project.

Even the large designers (AMD, Apple, Mediatek) don't have their own fabs. You would "just" need to order a design made - probably for hundreds of thousands of chips to make any sense. Is there information on what this step would actually require?

If you are willing to share silicon space with other chips, you can prototype chips on older nodes (e.g., 14nm) through services like MOSIS for "just" tens of thousands of dollars: https://www.mosis.com/products/fab-schedule

Re: Darpa invests $100M in a silicon compiler

#205

Earlier quoted context omitted.

BGA is actually easier than leaded SMD parts. The tiny leads tend to bridge easily. With BGA you can be up to half the pitch off and it will center itself. I actually only go for leadless and BGA now because anything else is more of a hassle. It is a bit rude to assume I don't know what a BGA part is.

The tweezers bit is what triggered that. Handling a large BGA with tweezers is going to scratch the PCB if you're not ultra careful. Anyway, if you do this stuff often enough then I see no reason why you wouldn't get the proper tools, a rework station and an actual reflow oven or something with a PID controlled heating element would make your life so much easier. Working with bad tools would drive me nuts. The reason…

The tweezers are for the 0802 passives and nudging the FPGA itself. It takes forever but then so does programming the pick and place for a one-off.

As for the reflow you can actually get more consistent results with the toaster oven - It just won't be able to handle the volume of actual production. Whatever you do just don't try going "semi-pro" and getting one of those IR ovens from China. Stick with the $40 walmart special. The toaster oven when heated slowly is much less likely to have hot and cold spots. Stenciling and placing parts take up a lot more time and are much more error prone.

Re: Darpa invests $100M in a silicon compiler

#206
What even is this project? There are no details on the DARPA page either.

Is it for PCB design, ASIC design or both? Is a constant current source also considered a “small chip” or just digital designs?

Basically every EDA tool already has the ability to group sub modules which one could distribute as open source if they chose.

Do it in kicad and put your circuit into a hierarchal symbol if you must be all open source.

I get hard IP blocks from vendors all the time for inclusion in our ASICs.

It’s not the EDA tools that are preventing “openness”.

I was just joking the other day how all the PCB designs I’m reviewing lately are just conglomerations of app note circuits and it’s really boring. So to me it seems like there’s plenty of design reuse. :)

Re: Darpa invests $100M in a silicon compiler

#207
post #176

Earlier quoted context omitted.

I've noticed it a lot going to trade shows that the North American market has turned so much to the high end that most people assume you need all this fancy gear to make anything. Its really stifling innovation in my opinion. People think they needs tens of thousands to get an MVP prototype out the door and most of the time it kills the idea. If you are a big company and already have the resources then by all means u…

It's been a little while since I did proto boards, but I remember a vast chasm between industrial & hobbyist, that basically forced me to wrangle packages I had no desire to deal with. You could get 4GB DDR2 DIMMs, or you could get a DIP 8kB SRAM. For a microchip you could get TQFP-32, or BGA-1000. So on and so forth. I remember a useful chip that came in nothing but QFN-16. It seemed like it wasn't I need fancy gear…

I'm trying really hard to communicate that you can use these parts pretty easily. Just get a stencil made with your PCB it's another $40. Add in a toaster oven, some solder paste and tweezers and your all set.

Once you see how easy it is to reflow a board you won't want to bother with hand soldering DIP packages anyway.

Re: Darpa invests $100M in a silicon compiler

#208

"Most importantly, we have to change the culture of hardware design. Today, we don’t have open sharing … " This, to the 100th power. The culture in the EDA industry is stuck in the 1950's when it comes to collaboration and sharing, it's very frustrating for newcomers and people who want to learn the trade. As was pointed out by someone in another hardware related HN thread, what can you expect from an industry that i…

What in the EDA industry is preventing this?

Every CAD system I know of supports ways of group circuits into modules and libraries for multiple Instantation. And those libraries are distributable.

Re: Darpa invests $100M in a silicon compiler

#209
post #200

Earlier quoted context omitted.

Not just that, but there was a genuine effort to make programming more like connecting together components on a board.

How was that different than ideas found in object oriented programming?

There were folks that believe you could instantiate objects graphically, and just connect them together and wire them up. Take a look at Java Spring Beans, which let you describe object instances through XML that either defines an object instance or wires up other instances together.

Re: Darpa invests $100M in a silicon compiler

#210
post #111

Earlier quoted context omitted.

I was thinking this mostly from the standpoint of viral nature of GPL-kind of FOSS licenses. E.g. somehow, somewhere someone manages to inject a GPL licensed IP block into a commercial CPU, after which, with my layman understanding, chip manufacturer now owes under the terms of GPL everyone who happens to have purchased one of those chips a full VHDL, Verilog etc. source code of the entire chip. In software you can a…

That is an absurdly wrong interpretation of both the GPL and how the courts exercise common sense.

How would you interpret the GPL in above situation?

Intuitively I'd thought something similar, but IANAL and could be completely wrong, of course :)

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