Intel Shows Xeon Scalable Gold 6138P with Integrated FPGA, Shipping to Vendors • Hacker News Board

Re: Intel Shows Xeon Scalable Gold 6138P with Integrated FPGA, Shipping to Vendors

#71

Post by craigjb » Fri, May 18, 2018, 4:37 AM UTC

obl wrote: post #8

rjsw wrote: post #6

Earlier quoted context omitted.

Learning an HDL isn't that hard. I was productive within a few weeks of starting to use VHDL. A former colleague is now an Altera/Intel FAE, I will ask how things are going the next time we meet up for a beer.

HDLs are fine. I've found the tooling around them to be quite atrocious (slow, buggy, opaque, gui-based) though. Be it for synthesis, simulation, or even just compiler errors it's pretty bad compared to software.

I’ve started using SpinalHDL, https://github.com/SpinalHDL/SpinalHDL. It’s a Scala DSL that spits out Verilog or VHDL for traditional synthesis tools. But, unlike Chisel or MyHDL, in my opinion it’s a great experience. And, now it has seamless integration with Verilator for simulation, and the open-source Verilator project is very capable—they claim it beats commercial simulators: https://www.veripool.org/wiki/verilator. Since Scala is quite a bit faster than Python, the simulations run much faster than something like Cocotb too!

I have my hobby project in SpinalHDL up at https://craigjb.com

Edit: also, GTKWave is pretty good! It’s a simple and straightforward waveform viewer that works on all platforms.

Re: Intel Shows Xeon Scalable Gold 6138P with Integrated FPGA, Shipping to Vendors

#72

Post by ksec » Fri, May 18, 2018, 4:38 AM UTC

I wonder if amd could produce epyc with tsmc and xilinx.

xilinx is a much better choice in fpga

Re: Intel Shows Xeon Scalable Gold 6138P with Integrated FPGA, Shipping to Vendors

#73

Post by hoodoof » Fri, May 18, 2018, 5:12 AM UTC

What's the use case of an integrated FPGA?

Re: Intel Shows Xeon Scalable Gold 6138P with Integrated FPGA, Shipping to Vendors

#74

Post by 1024core » Fri, May 18, 2018, 5:32 AM UTC

So what can you do with 1.15M logic gates that are in that FPGA? Can you, say, multiply, say 2 256x256 FP32 matrices?

Re: Intel Shows Xeon Scalable Gold 6138P with Integrated FPGA, Shipping to Vendors

#75

Post by SlowRobotAhead » Fri, May 18, 2018, 5:53 AM UTC

epmaybe wrote: post #41

kev009 wrote: post #39

Earlier quoted context omitted.

The standard path is more trodden than software development jobs -- ECE grad at a school with a good program.

I know I took a digital logic course and did some fpga implementations in it, man that was hard. I am petrified of having to deal with HDL in the near future for my research, maybe I'll take a class or something.

In school they make you do it the hard way. I find verilog to be very similar to my process of how I write embedded C code.... short version is if you can make block diagrams and write good C, you can learn verilog.

Re: Intel Shows Xeon Scalable Gold 6138P with Integrated FPGA, Shipping to Vendors

#76

Post by SlowRobotAhead » Fri, May 18, 2018, 6:00 AM UTC

mozumder wrote: post #69

schappim wrote: post #47

Earlier quoted context omitted.

How would you recommend getting into the field?

Electrical Engineering college degree. That's the only option. I've never seen non-college degree electrical engineers.

Allow me to introduce myself... not really becsuse anoniminity. But I’m effectively an EE at my company with no degree. Hardware, firmware, software, sourcing, production, validation/testing, and low volume assembly, all self taught. I’ll grt into FPGA when I have a use for it, but it certainly won’t be FFTs and DSPs but still.

I’m glad I don’t have to job surf, it would be hard without paper, but my experience would be very valuable in my tiny field.

Re: Intel Shows Xeon Scalable Gold 6138P with Integrated FPGA, Shipping to Vendors

#77

Post by SlowRobotAhead » Fri, May 18, 2018, 6:02 AM UTC

ktta wrote: post #32

slrz wrote: post #15

Earlier quoted context omitted.

> I wouldn't be surprised if Intel came up with tools which help make use of the FPGA using higher languages like C. These (almost by necessity) make you write code that doesn't look like any other C code. You can't just use some pre-existing C library and compile it to use FPGA resources. At that point, why not go a step further and just use a proper HDL?

Because although HDL doesn't look difficult syntax wise, it requires a very good understanding of logic gates. People need to pretty much take a course in digital design to be able to write something meaningful. It took me a while to grok HDL and write working code (good, maintainable code aside) even though I took digital design courses.

HDL ISNT CODE.

FPGAs don’t get firmware.

HDL is a description of hardware.

Re: Intel Shows Xeon Scalable Gold 6138P with Integrated FPGA, Shipping to Vendors

#78

Post by sannee » Fri, May 18, 2018, 6:08 AM UTC

denkmoon wrote: post #51

jayonsoftware wrote: post #27

Earlier quoted context omitted.

Arria 10 FPGA is kind of mid range, I think they go around for 500 bucks , you can buy the dev board for 5K ( https://www.altera.com/products/boards_and_kits/dev-kits/alt... )

Why are dev boards that much more expensive in general? I can't believe that it costs 10x as much to "just" put the chip on a pcie board.

If you are seriously interested in using 500$ chip in any "interesting" volume, shelling out 5k$ for a dev board is nothing you would care about.

Re: Intel Shows Xeon Scalable Gold 6138P with Integrated FPGA, Shipping to Vendors

#79

Post by vegetablepotpie » Fri, May 18, 2018, 6:14 AM UTC

hoodoof wrote: post #73

What's the use case of an integrated FPGA?

I can think of two possibilities: 1. Hardware accelerated custom crypto algorithms. 2. Specialized co-processor. You could implement an exotic processing architecture on the FPGA to off-load computations to, like a complex number processor with 52-bit words in a custom floating point format for a specific application.

Re: Intel Shows Xeon Scalable Gold 6138P with Integrated FPGA, Shipping to Vendors

#80

Post by mozumder » Fri, May 18, 2018, 6:18 AM UTC

SlowRobotAhead wrote: post #76

mozumder wrote: post #69

Earlier quoted context omitted.

Electrical Engineering college degree. That's the only option. I've never seen non-college degree electrical engineers.

Allow me to introduce myself... not really becsuse anoniminity. But I’m effectively an EE at my company with no degree. Hardware, firmware, software, sourcing, production, validation/testing, and low volume assembly, all self taught. I’ll grt into FPGA when I have a use for it, but it certainly won’t be FFTs and DSPs but still. I’m glad I don’t have to job surf, it would be hard without paper, but my experience would…

For sure technicians that do these are a thing for finishing work, who may have AS degrees instead of BS EE. I've worked with them as well. They were always referred to as technicians that EE's hand-off more of the board-level debugging to (or even GDS II for ASIC design..). The core datapath processing algorithms were always done by EE's, though.