This was what I exactly predicted one year ago. Risk-V ISA is coming for all of them{x86,arm,mips}. And this is very smart move by WD to jump into Risk-V wagon. Update: Why do people downvote? I honestly don’t understand.
>> Why do people downvote? Because they can't handle the fact that you're right. RISC-V is coming for all of them. I like your phrasing too, it's accurate but I guess people think it's more pretentious. Only time will tell for sure.
Western Digital Plans to Ship More Than One Billion RISC-V Cores a Year
21–30 of 149 posts
Re: Western Digital Plans to Ship More Than One Billion RISC-V Cores a Year
#22I haven't been following the RISC-V story too closely, possibly because I didn't want to get my hopes up only to be dashed. From the article, it sounds like these cores will be developed solely for use in data storage. Can someone with more knowledge tell whether this will help provide the kind of production volume needed to make consumer products (like laptops and desktops) more likely to be viable? Are general purp…
Re: Western Digital Plans to Ship More Than One Billion RISC-V Cores a Year
#23That, and I'm kind of disappointed everyone has drunk the RISC kool-aid. I think a lot of RISC "performance" has more to do with compilers catering to the least common denominator than anything else. If you had a language/compiler that took better advantage of a stack architecture, or even a CISC architecture, the performance would probably be just as good if not better.
I was particularly impressed by Baker's old paper[0] on stack architectures in service of his Linear Lisp idea.
Re: Western Digital Plans to Ship More Than One Billion RISC-V Cores a Year
#24Earlier quoted context omitted.
whether this will help provide the kind of production volume needed to make consumer products (like laptops and desktops) more likely to be viable? It probably won't, despite a lot of wishful thinking to the contrary. Are general purpose chips likely to be one result of the development of RISC-V, or have I missed something fundamental? Out of the whole RISC-V ecosystem it looks like only SiFive is working on that, so…
The announcement does say "we are providing all of our RISC-V logic work to the community." Whatever that means.
Re: Western Digital Plans to Ship More Than One Billion RISC-V Cores a Year
#25Presentation brief slides: http://innovation.wdc.com/downloads/RISC-V-Presentation-Brie...
Re: Western Digital Plans to Ship More Than One Billion RISC-V Cores a Year
#26This was what I exactly predicted one year ago. Risk-V ISA is coming for all of them{x86,arm,mips}. And this is very smart move by WD to jump into Risk-V wagon. Update: Why do people downvote? I honestly don’t understand.
I guess there are RISC-V haters...? Good grief.
Re: Western Digital Plans to Ship More Than One Billion RISC-V Cores a Year
#27I like the idea behind RISC-V's open architecture but I had a question. Does it do or even try to do anything about the cloud of uncertainty surrounding Intel ME and the AMD equivalent in x86?
It’s a critically important question and it requires active grassroots involvement to make sure that we don’t end up with a mere clone of ME, or worse a “better ME.”
Re: Western Digital Plans to Ship More Than One Billion RISC-V Cores a Year
#28Then I read the article, and the article is so full of buzzwords and genericisms that after reading the whole thing, I don't know if this guess is correct.
Re: Western Digital Plans to Ship More Than One Billion RISC-V Cores a Year
#29Earlier quoted context omitted.
>> Why do people downvote? Because they can't handle the fact that you're right. RISC-V is coming for all of them. I like your phrasing too, it's accurate but I guess people think it's more pretentious. Only time will tell for sure.
There's a lot of wishful thinking involved in this. It's like Linux on the desktop: doable but very much a fringe thing.
Re: Western Digital Plans to Ship More Than One Billion RISC-V Cores a Year
#30I guess this will be nice for industry, which may pass the savings along to the consumer, but as far as having auditable hardware that you have some control over, I don't see how this is any better than the ARM SoCs we already have--unless you're going to roll your own system on an FPGA. That, and I'm kind of disappointed everyone has drunk the RISC kool-aid. I think a lot of RISC "performance" has more to do with co…