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Western Digital Plans to Ship More Than One Billion RISC-V Cores a Year

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Re: Western Digital Plans to Ship More Than One Billion RISC-V Cores a Year

#3
I think the level of industry enthusiasm for RISC-V is so palpable, in part, because the messaging from day one has been unequivocally: RISC-V will be the standard ISA for every form factor, in every market.

Can't wait to put a RISC-V SBC in my ThinkPad X220 chassis. :- )

Re: Western Digital Plans to Ship More Than One Billion RISC-V Cores a Year

#5
post #4

I like the idea behind RISC-V's open architecture but I had a question. Does it do or even try to do anything about the cloud of uncertainty surrounding Intel ME and the AMD equivalent in x86?

I don't think it necessarily addresses that concern, but Machine mode might be the right place to address the concerns which ME addresses on a RISC-V machine; which means that it's at least more likely that it'll be programmable on whatever machine you're looking at.

Just a thought though, it could really go any way. The nice thing though, is that you'll have more than two vendors, which means that the niche of PSP/ME paranoids may be large enough to address for a smaller designer, or through a limited run of licensed design (like SiFive's).

Re: Western Digital Plans to Ship More Than One Billion RISC-V Cores a Year

#6
I haven't been following the RISC-V story too closely, possibly because I didn't want to get my hopes up only to be dashed. From the article, it sounds like these cores will be developed solely for use in data storage. Can someone with more knowledge tell whether this will help provide the kind of production volume needed to make consumer products (like laptops and desktops) more likely to be viable? Are general purpose chips likely to be one result of the development of RISC-V, or have I missed something fundamental?

Re: Western Digital Plans to Ship More Than One Billion RISC-V Cores a Year

#7
post #4

I like the idea behind RISC-V's open architecture but I had a question. Does it do or even try to do anything about the cloud of uncertainty surrounding Intel ME and the AMD equivalent in x86?

I don't think it necessarily addresses that concern, but Machine mode might be the right place to address the concerns which ME addresses on a RISC-V machine; which means that it's at least more likely that it'll be programmable on whatever machine you're looking at. Just a thought though, it could really go any way. The nice thing though, is that you'll have more than two vendors, which means that the niche of PSP/M…

I'm one of the paranoids. This is one of the main things I'm hoping for. Is there any indication of what price point such chips might be offered at? I have no idea how much it costs to set up fabrication, etc., but it seems like ARM chips have done very well.

Re: Western Digital Plans to Ship More Than One Billion RISC-V Cores a Year

#9
post #4

I like the idea behind RISC-V's open architecture but I had a question. Does it do or even try to do anything about the cloud of uncertainty surrounding Intel ME and the AMD equivalent in x86?

RISC-V is not an architecture, it is just an instruction set. People still need to design the architecture for an implementation of RISC-V.

Intel ME is a co-processor that runs at the same time as the main processor, it is not related to the instruction set.

To answer your question: Intel ME is a problem that happens on an higher level than the document that defines instruction set.

Re: Western Digital Plans to Ship More Than One Billion RISC-V Cores a Year

#10

I think the level of industry enthusiasm for RISC-V is so palpable, in part, because the messaging from day one has been unequivocally: RISC-V will be the standard ISA for every form factor, in every market. Can't wait to put a RISC-V SBC in my ThinkPad X220 chassis. :- )

> a RISC-V SBC in my ThinkPad X220 chassis

afk, changing pants

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