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IBM scientists say radical new ‘in-memory’ architecture will speed up computers

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Re: IBM scientists say radical new ‘in-memory’ architecture will speed up computers

#111
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post #34

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Do you remember when IBM sold off their hard drive research division? I was convinced this meant they knew memristors were going to kill hard drives soon and they were profit taking before killing them off. That’s been more than ten years now. I am still waiting, but made other plans.

They sold it when hard drives became a commodity item - generally commodity items don't get major R&D attached to them.

There's still plenty of R&D being done with storage: https://www.anandtech.com/show/11925/western-digital-stuns-s...

Re: IBM scientists say radical new ‘in-memory’ architecture will speed up computers

#112

Earlier quoted context omitted.

Computational memory can't speed up 'everything' because most software doesn't benefit from single operations that span a large chunk of data (AKA SIMD ops, as on GPUs). This technique will always improve only a small select fraction of present and future software, like games/graphics, video and voice processing, and general purpose vector operations (like tensor ops in deep learning).

Or programs are not written to use computational memory because there isn't any for them to use. Besides, computational memory is not restricted to SIMD. It's limited into local memory, but not at synchronized execution.

How many programs can even manage to use two full-featured cores in parallel, with everything made as easy as possible? How many even try to do calculations on a GPU?

I'm not holding my breath for more than 1% of programs to use this. Or if it gets built into GPUs, then 1% when possibly excluding rendering code.

Re: IBM scientists say radical new ‘in-memory’ architecture will speed up computers

#114

Earlier quoted context omitted.

That's how I feel. I used FPGAs in the late 90s and wanted to try making a parallel chip with say 1024 cores and a few K of RAM per core and then program it with something like Erlang. Then the dot bomb happened, then the housing bomb, the Great Recession, and so on and so forth. The big players got more entrenched so everything was evolutionary instead of revolutionary and I'd say computer engineering (my major, nev…

TBH, seeing Chuck Moore talk about its GreenArray forth silicon gave me the inspiration. Since all cores are ALU+RAM and can send data/code to neighbors you get a "smart buffer". I found it so damn exciting I can't stop dreaming about this. Even a subset of the idea, having blit in ram (swap, row/col-zeroing, etc etc) could reduce pressure on the memory bus.

Have you read about the J-machine? An older research machine that was sort of like that. Trouble is that we need to change software and hardware together to really reap the advantage.

Re: IBM scientists say radical new ‘in-memory’ architecture will speed up computers

#115

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> And correct me if I'm wrong, but can you even reprogram an FPGA while it is actively being used? You're wrong, this is called partial reconfiguration.

Can you reprogram the part of an FPGA that is actively being used?

The answer is no, but the sad part is, there's no real reason why not.

An FPGA isn't really a "gate array," but a huge ensemble of small lookup tables that are made with what amounts to very fast static RAM. If major FPGA manufacturers didn't guard their bitfile formats with their lives, it's possible that entirely new fields of research would have emerged to find new ways to take advantage of the existing hardware in these chips, much like what GPGPU researchers have done with graphics cards.

Re: IBM scientists say radical new ‘in-memory’ architecture will speed up computers

#116
post #64

Earlier quoted context omitted.

Doubtful, the first purpose built memristor existed in 2008. Though to be honest we've seen them since the 1800's as oddities in certain electrical circuits. They've been theorized since 1971 mathmatically but until fairly recently haven't been a thing. It is the fourth fundamental circuit, give it a while before discounting it. And be happy you're alive when the fourth fundamental circuit was discovered and made rea…

Feynman also ranted about how much processing within the memory would speed computing in the 80's. He challenged those "computer scientists" to figure it out :P .... this lecture: http://cse.unl.edu/~seth/434/Web%20Links%20and%20Docs/Feynma...

That's how I heard of them referred to since at least the early 90's, as processor-in-memory. I didn't know memristor was referring to the same concept.

Re: IBM scientists say radical new ‘in-memory’ architecture will speed up computers

#117

Earlier quoted context omitted.

Or programs are not written to use computational memory because there isn't any for them to use. Besides, computational memory is not restricted to SIMD. It's limited into local memory, but not at synchronized execution.

How many programs can even manage to use two full-featured cores in parallel, with everything made as easy as possible? How many even try to do calculations on a GPU? I'm not holding my breath for more than 1% of programs to use this. Or if it gets built into GPUs, then 1% when possibly excluding rendering code.

How many programs need to? The ten year old laptop I'm writing this comment on is fast enough for everything I want to do. Even my Raspberry Pi is fast enough for almost everything I want to do.

Re: IBM scientists say radical new ‘in-memory’ architecture will speed up computers

#118
post #12

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Maybe for the same reason as people don't get more excited about quantum computers -- they can replace basically everything as well, yet we don't see them around.

Quantum computers require both very specific configuration for each problem, and cryogenic cooling. Both of those issues mean there's no reason to suspect they will find more than use as a daughtercard any time soon. Memristors, on the other hand, could replace CPUs, RAM, SSDs, bulk storage, FPGAs with one consistent lattice, a totally unified memory architecture, and an economy of scale that I don't believe has ever…

The speed of light dictates that there will always be a memory hierachy. A nanosecond is just a couple of inches of wire [1]. Communication overhead and heat issues are what ultimately limits computational power [2].

[1] http://www.youtube.com/watch?v=JEpsKnWZrJ8

[2] https://en.wikipedia.org/wiki/Limits_of_computation

Re: IBM scientists say radical new ‘in-memory’ architecture will speed up computers

#119

Earlier quoted context omitted.

Can you reprogram the part of an FPGA that is actively being used?

The answer is no, but the sad part is, there's no real reason why not. An FPGA isn't really a "gate array," but a huge ensemble of small lookup tables that are made with what amounts to very fast static RAM. If major FPGA manufacturers didn't guard their bitfile formats with their lives, it's possible that entirely new fields of research would have emerged to find new ways to take advantage of the existing hardware i…

Hmmmm.

I wonder how expensive it would be to make a really really tiny FPGA with a few tens of cells in it.

As in, I realize chip design is expensive and crazy complicated, but small runs are only around $5k or so. I'm wondering if FPGAs manufacturing has similar costs - or at least similar-ish enough to be potentially interesting.

If you could go from zero to tiny prototype FPGA with 5 or 6 figures, you might just be able to pull some VC money out of thin air to kickstart with. Or you might not even need to go in the VC direction, there's bound to be a group of people out there with collectively enough between them to kickstart something like this. I'm uncertain if Kickstarter would be a horrible disaster.

With prototypes made, you'd just need to send a few of the prototypes out to some smart PhDs and hardware hackers, get them to show what's possible, and that could be a viable way to get further investment and complete the bootstrap cycle.

Obviously the point of all of this is to make a chip that's as open as reasonably possible. Physical chip manufacturing is likely to be NDA'd (for example the SRAM would probably be supplied as a reference design from the foundry) but the "how to poke this with software" could be super open. Would be fun.

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