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IBM scientists say radical new ‘in-memory’ architecture will speed up computers

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Re: IBM scientists say radical new ‘in-memory’ architecture will speed up computers

#61

For god's sake. I've been pitching this for years .. I can't sigh hard enough.

That's how I feel. I used FPGAs in the late 90s and wanted to try making a parallel chip with say 1024 cores and a few K of RAM per core and then program it with something like Erlang. Then the dot bomb happened, then the housing bomb, the Great Recession, and so on and so forth. The big players got more entrenched so everything was evolutionary instead of revolutionary and I'd say computer engineering (my major, never used) got set back 10-15 years.

But that said, I'm excited that 90s technology is finally being adopted by the AI world. I'm also hopeful that all these languages like Elixir, Go and MATLAB/Octave will let us do concurrent programming in ways that are less painful than say OpenCL/CUDA.

Re: IBM scientists say radical new ‘in-memory’ architecture will speed up computers

#62
post #9

Earlier quoted context omitted.

I'm not so sure. CPUs are stupidly fast, now - the bottleneck is virtually always the time it takes to move data in and out of memory. What if, instead of trying to bring the data to the calculation, you brought the calculation to the data? You could speed up everything . Fun to think about: in this scenario, the main job of an "optimizing compiler" would be to organize things spatially so that, as a calculation move…

Computational memory can't speed up 'everything' because most software doesn't benefit from single operations that span a large chunk of data (AKA SIMD ops, as on GPUs). This technique will always improve only a small select fraction of present and future software, like games/graphics, video and voice processing, and general purpose vector operations (like tensor ops in deep learning).

Or programs are not written to use computational memory because there isn't any for them to use.

Besides, computational memory is not restricted to SIMD. It's limited into local memory, but not at synchronized execution.

Re: IBM scientists say radical new ‘in-memory’ architecture will speed up computers

#63
post #51

Earlier quoted context omitted.

> They were right. Who was right about what? > They are the equivalent of second generation laser printers. What does this even mean?

Roentgen and Retina displays are in the neighborhood of 200 ppi, which is about when laser printers became 'clear' and legible, which was the thesis behind Roentgen. But now you've got smart phones pushing in the region of 400 PPI. It's smoother, and make Apple displays look like laggards. But they're beyond the point where most eyes notice the difference without magnification.

The PPI required for the "Retina" effect is largely dependent on viewing distance, which is why Apple vary the PPI according to the device, they aren't a blanket ~200 PPI as you suggest.

The Apple Watch and most iPhones (including the original Retina display on the iPhone 4) are around 300-400 PPI, with the X being 458. Only Apple's "Retina" laptop/iMac displays have been around 220, which normally looks great given the increase in the viewing distance.

Wikipedia has a pretty nice breakdown of the PPI of all Retina displays Apple has shipped:

https://en.wikipedia.org/wiki/Retina_Display

Re: IBM scientists say radical new ‘in-memory’ architecture will speed up computers

#64
post #36
post #24

Earlier quoted context omitted.

> I've never understood why people don't get more excited about memristors. personally, mostly because i've been seeing articles about how they're just about to totally upend computing for the last ten years

Pretty sure I first read about them in a PC World magazine I got at the airport on a family vacation in like 2003

Doubtful, the first purpose built memristor existed in 2008. Though to be honest we've seen them since the 1800's as oddities in certain electrical circuits.

They've been theorized since 1971 mathmatically but until fairly recently haven't been a thing.

It is the fourth fundamental circuit, give it a while before discounting it. And be happy you're alive when the fourth fundamental circuit was discovered and made real.

Re: IBM scientists say radical new ‘in-memory’ architecture will speed up computers

#65
post #24

Earlier quoted context omitted.

> I've never understood why people don't get more excited about memristors. personally, mostly because i've been seeing articles about how they're just about to totally upend computing for the last ten years

10 years? I've been seeing them hyped as the "next big thing" since the 90s. HP keeps pumping out press releases every so often.

How? The first memristor was created in 2008.

Re: IBM scientists say radical new ‘in-memory’ architecture will speed up computers

#66
post #24

This is the promise of memristors. Despite innumerable articles being written about neuromorphic architectures like they'll be something miraculous, this ability to change from functioning as a bit of memory to being a bunch of functional logic on the fly at the speed of a memory read? That's going to be crazy. It will open up possibilities that we probably can't even imagine right now. I've never understood why peop…

> I've never understood why people don't get more excited about memristors. personally, mostly because i've been seeing articles about how they're just about to totally upend computing for the last ten years

I've noticed that overly excited articles are tend to be nonsense until they're finally true.

I know that sounds like tautological nonsense, but the trick comes down to predicting when these things will become real rather than if they become real. From my experience, if you want a good indication, look at price/performance trends for a particular technology. If that technology has no price/performance data, look at the price/performance data of its components or related technologies.

If you can't find price/performance data, then don't get too excited yet.

Re: IBM scientists say radical new ‘in-memory’ architecture will speed up computers

#67
post #5

This is the promise of memristors. Despite innumerable articles being written about neuromorphic architectures like they'll be something miraculous, this ability to change from functioning as a bit of memory to being a bunch of functional logic on the fly at the speed of a memory read? That's going to be crazy. It will open up possibilities that we probably can't even imagine right now. I've never understood why peop…

Well with most claims that generalize computing power, such as the title of this, it's mostly aimed at something more specialized. "The researchers believe this new prototype technology will enable ultra-dense, low-power, and massively parallel computing systems that are especially useful for AI applications." So it seems that would benefit AI/Machine Learning more than GP processing, from that statement.

AI stuff would be easy to implement on it, but general computation will almost certainly benefit just as much once research is done. It's a fundamentally different architecture when your assembly language can include instructions that essentially re-wire the FPGA which is your processor/storage. That makes possible entirely new classes of algorithms.

Re: IBM scientists say radical new ‘in-memory’ architecture will speed up computers

#68
post #9

Earlier quoted context omitted.

I'm not so sure. CPUs are stupidly fast, now - the bottleneck is virtually always the time it takes to move data in and out of memory. What if, instead of trying to bring the data to the calculation, you brought the calculation to the data? You could speed up everything . Fun to think about: in this scenario, the main job of an "optimizing compiler" would be to organize things spatially so that, as a calculation move…

Computational memory can't speed up 'everything' because most software doesn't benefit from single operations that span a large chunk of data (AKA SIMD ops, as on GPUs). This technique will always improve only a small select fraction of present and future software, like games/graphics, video and voice processing, and general purpose vector operations (like tensor ops in deep learning).

There is no reason whatsoever that this would be limited to SIMD operations. They will be easy to do because you just spam a certain set of gates out in an array, but you could be laying down completely novel, or programatically determined, gates instead.

Re: IBM scientists say radical new ‘in-memory’ architecture will speed up computers

#69

For god's sake. I've been pitching this for years .. I can't sigh hard enough.

That's how I feel. I used FPGAs in the late 90s and wanted to try making a parallel chip with say 1024 cores and a few K of RAM per core and then program it with something like Erlang. Then the dot bomb happened, then the housing bomb, the Great Recession, and so on and so forth. The big players got more entrenched so everything was evolutionary instead of revolutionary and I'd say computer engineering (my major, nev…

TBH, seeing Chuck Moore talk about its GreenArray forth silicon gave me the inspiration. Since all cores are ALU+RAM and can send data/code to neighbors you get a "smart buffer". I found it so damn exciting I can't stop dreaming about this.

Even a subset of the idea, having blit in ram (swap, row/col-zeroing, etc etc) could reduce pressure on the memory bus.

Re: IBM scientists say radical new ‘in-memory’ architecture will speed up computers

#70
post #25

This is the promise of memristors. Despite innumerable articles being written about neuromorphic architectures like they'll be something miraculous, this ability to change from functioning as a bit of memory to being a bunch of functional logic on the fly at the speed of a memory read? That's going to be crazy. It will open up possibilities that we probably can't even imagine right now. I've never understood why peop…

"this ability to change from functioning as a bit of memory to being a bunch of functional logic on the fly at the speed of a memory read?" My excitement is tempered by considering the areal demands on the silicon for the putative "smart memory". Suppose, just for the sake of argument, you want your smart memory to be able to take a 4K block of 64-bit integers and add them together. It happens incredible quickly, sur…

No, you don't need more gates in each memory cell to support each possible operation. The memory cell turns into gates. They are the same thing, just in a different configuration. And yes, it would be a ton of silicon, likely more than you're imagining. It would subsume all CPU silicon, all cache, all main memory, all mass storage. Into one fabric which at any point can either store data, or compute. And yes, it persists without power too.
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