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Intel releases the last Itanium chip, the 9700

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Re: Intel releases the last Itanium chip, the 9700

#11

Post by deepnotderp »

userbinator wrote: post #2

The Itanium is a noteworthy example of what happens when one designs an architecture exclusively for parallelism to the exclusion of all else, and leaves all instruction scheduling to the compiler. The performance was great when software could take advantage of the parallelism, but horrible otherwise, since the processor would still be fetching bundles of 3 instructions (16 bytes each!) but only 1/3 of them would be…

Your sequential CPUs are also exploiting parallelism to go faster, OoO execution, VLIW just wanted to do that in the compiler. There was nothing inherently wrong with the idea, the folly of Itanium was not the focus on parallelism, it was that compiler technology was not sufficiently advanced.

Re: Intel releases the last Itanium chip, the 9700

#12

Post by smacktoward »

sfifs wrote: post #9

Question seeking to understand - Why would anyone buy a tech component product that is explicitly called out as last of its kind?

Because you've already sunk an enormous amount of money into the architecture, and you're looking to defer the day when you have to admit that was a bad idea for as long as humanly possible.

Re: Intel releases the last Itanium chip, the 9700

#14

Post by dom0 »

deepnotderp wrote: post #7
KenoFischer wrote: post #5

Earlier quoted context omitted.

> I suppose a similar analogy would be doing everything in x86 with SIMD instructions and not using the scalar set at all. With ever wider SIMD units this is actually happening to some extent. With AVX512 (e.g. on KNL) you can do 64 operations (single precision FLOPs) in vector units in the same amount of time as you can do 1 scalar operation. Combined with the low clock speed of the KNL, you really don't want to be…

This, recent compiler advances in the past two decades have actually made VLIW somewhat tractable, but since the memory hierarchy and data movement wall consumes most of the power nowadays, the benefits of VLIW are mitigated.

Even if that were so, things are moving away from VLIW. E.g. AMD switched from VLIW to a more standard load-store SIMT approach a couple years ago, and even though it's more complex for the GPU, it increased system efficiency (esp. for workloads that their compiler was not well tuned for).

Re: Intel releases the last Itanium chip, the 9700

#15

Post by nickpsecurity »

sfifs wrote: post #9

Question seeking to understand - Why would anyone buy a tech component product that is explicitly called out as last of its kind?

1. To keep your stuff running that's stuck on that chip. Replacements are being made but not finished for many customers. The article actually covers this for HP's customers. OpenVMS was on Itanium as well with a x86 port underway. SGI was on Itanium but moved to Xeon more quickly.

2. To get benefits that chip has that others don't. Secure64 is the main use-case I know for this. For me, I considered buying some SGI Altix's off ebay that were going for $100-200 each. Reliable chip and server with built-in security features that almost nobody is targeting on top of that. Such an approach has always paid off for me in the past.

https://secure64.com/secure-operating-system/

Re: Intel releases the last Itanium chip, the 9700

#16

Post by DannyBee »

userbinator wrote: post #2

The Itanium is a noteworthy example of what happens when one designs an architecture exclusively for parallelism to the exclusion of all else, and leaves all instruction scheduling to the compiler. The performance was great when software could take advantage of the parallelism, but horrible otherwise, since the processor would still be fetching bundles of 3 instructions (16 bytes each!) but only 1/3 of them would be…

"The Itanium is a noteworthy example of what happens when one designs an architecture exclusively for parallelism to the exclusion of all else, and leaves all instruction scheduling to the compiler. "

Well no, it would be more accurate to say "a noteworthy example of when you release a chip that isn't in line with what common programming languages can do".

That is, there is nothing wrong with doing the above. There's something wrong with doing the above when you most people are writing sequential C++ :)

There simply wasn't enough ILP to extract :)

IE no amount of compiler advance would have saved it.

Re: Intel releases the last Itanium chip, the 9700

#17

Post by DannyBee »

deepnotderp wrote: post #11
userbinator wrote: post #2

The Itanium is a noteworthy example of what happens when one designs an architecture exclusively for parallelism to the exclusion of all else, and leaves all instruction scheduling to the compiler. The performance was great when software could take advantage of the parallelism, but horrible otherwise, since the processor would still be fetching bundles of 3 instructions (16 bytes each!) but only 1/3 of them would be…

Your sequential CPUs are also exploiting parallelism to go faster, OoO execution, VLIW just wanted to do that in the compiler. There was nothing inherently wrong with the idea, the folly of Itanium was not the focus on parallelism, it was that compiler technology was not sufficiently advanced.

It's not even that, it's "common programming languages and programming paradigms do not always enable you to exploit this".

IE if everyone is writing sequential C++, making a chip that is really good for parallel fortran is .... silly.

No amount of compiler advance would have saved itanium. Research early on shows except for very contrived kernels, there wasn't enough ILP to extract.

It actually did a really good job of doing what it could :)

Re: Intel releases the last Itanium chip, the 9700

#18

Post by CalChris »

deepnotderp wrote: post #7
KenoFischer wrote: post #5

Earlier quoted context omitted.

> I suppose a similar analogy would be doing everything in x86 with SIMD instructions and not using the scalar set at all. With ever wider SIMD units this is actually happening to some extent. With AVX512 (e.g. on KNL) you can do 64 operations (single precision FLOPs) in vector units in the same amount of time as you can do 1 scalar operation. Combined with the low clock speed of the KNL, you really don't want to be…

This, recent compiler advances in the past two decades have actually made VLIW somewhat tractable, but since the memory hierarchy and data movement wall consumes most of the power nowadays, the benefits of VLIW are mitigated.

Trace scheduling started with Fisher 81 [1] and Ellis 85 [2]. Trace scheduling is what made VLIW even possible if not exactly tractable. That was 30+ years ago.

What recent advances have made VLIW any more tractable than trace scheduling already did? BTW, trace scheduling works for scheduling superscalar processors as well.

VLIW never went away. It's used in embedded, the TriMedia processors. It's used in the REX Computing NEO chip. The Mill CPU is a VLIW of sorts.

I'm not anti-VLIW but I don't know of any recent breakthroughs that make it any more tractable now for non-embedded, non-HPC general purpose computing.

[1] Trace Scheduling: A Technique for Global Microcode Compaction

https://pdfs.semanticscholar.org/5698/09af0fcbe5a42371cea8d3...

[2] Bulldog: a compiler for VLIW architectures

http://dl.acm.org/citation.cfm?id=912347

Re: Intel releases the last Itanium chip, the 9700

#19

Post by tyingq »

bluedino wrote: post #8
tyingq wrote: post #4

We would probably all be working with Itanium servers if not for AMD introducing 64 bit x86. I believe that also accelerated Linux adoption and the decline of all the commercial Unix platforms. Good to see AMD on the rise again. I appreciate their role in heading off Itanium.

What makes you think it wouldn't have been POWER? Or SPARC? They were both way more popular than PA-RISC.

Because Power and Sparc would have ceded to Itanium. Neither backer had the resources Intel did. The easy path to kill Itanium was x86-64, because it was inexpensive and worked with Linux and Windows. AMD didn't have to compete with Intel per se. It forced Intel to do X86-64 as well...which killed Itanium.

Re: Intel releases the last Itanium chip, the 9700

#20

Post by _0w8t »

tyingq wrote: post #4

We would probably all be working with Itanium servers if not for AMD introducing 64 bit x86. I believe that also accelerated Linux adoption and the decline of all the commercial Unix platforms. Good to see AMD on the rise again. I appreciate their role in heading off Itanium.

If I had to bet on the reason of Itanium failure, I would also choose AMD64. But not because it was cheap, but because it had x86 in the name. For some reason whenever Intel tried to abandon x86, they failed, like Itanium, i960, XScale.
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