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Open-source chip RISC-V to take on closed x86, ARM CPUs

computerworld.com.au

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Re: Open-source chip RISC-V to take on closed x86, ARM CPUs

#111
post #100

Earlier quoted context omitted.

When I did a presentation on RISC-V last year I counted 6 real implementations (full custom ASICs). Now granted only one or two of those you can buy, the others are research projects, but they do exist and they did produce real silicon. This year we should see a couple of 64 bit implementations, which is when it'll get really interesting. There are of course multiple FPGA implementations (I have one about 2 feet away…

Is your presentation online?

No it was a private talk about company strategy.

Re: Open-source chip RISC-V to take on closed x86, ARM CPUs

#112
post #53

RISC-V is atleast 10 years away from competing with x86 and ARM. It is just now getting to a point where it can power arduino class hardware. Long way to go... but looks promising.

The Freedom E310 chip in the HiFive1 board is shipping today and is already competitive with embedded ARM: https://www.crowdsupply.com/sifive/hifive1/#comparisons . It's comically faster (i.e., 100x) than the AVR chip in the Arduino Uno board, but the similar form factor makes it cheap & easy for early adopters to play around with. I'd bet that within five years a good proportion, even the majority, of Amazon & Googl…

It is not competitive at all yet. In the world of embedded system, the processing power is not all about embedded system. The CPU takes less than 10% of the sillicon of the chip. Look at what what it got - A single SPI, some PWMs, even so I2C, no hardware timer, no ADC/DAC. So it should rely on software implementation of peripheral. Lack of hardware peripherals will lead to fail real time requirements. It may slower than even arduino in some operations. Moreover, where are you going to use 320MHz with tiny 16kb of RAM? This chip might be useful for calculating such as DSP or Machine learning unit but this is yet practically useless for a microcontroller. There is yet a long way to take off.

Re: Open-source chip RISC-V to take on closed x86, ARM CPUs

#114
post #108
post #81

Earlier quoted context omitted.

You are talking like you could download RISC-V from the internet and send it to the foundry for mass production without additional costs or effort. RISC-V is just a document, is not an implementation. There are many costs involved into designing a CPU that end up costing much more money than paying a license fee. Check this comment: https://news.ycombinator.com/item?id=14284450

How about this: http://www.pulp-platform.org/ ? It still in development, but the plan is to release the full CPU. You still need process/foundry specific data of course (things like flash-cells).

The GAP8 is a real product based on the pulpino. It's a cpu, more of a low-power embedded dsp/mcu, and a good one at that.

http://www.eetimes.com/document.asp?doc_id=1330188

Re: Open-source chip RISC-V to take on closed x86, ARM CPUs

#115
post #90

AFAIK, most advanced RISC-V design includes superscalar and OoOE (e.g. comparable to a MIPS R10000 (1995) or an Intel Pentium Pro (1995)), while the RISC-V for the IoT is comparable to a typical single instructions per clock RISC CPU, e.g. MIPS R3000 (1988). The success in the IoT will depend not only in a cheaper price because of no royalties, but also in the "ecosystem": peripherals, buses, etc. Running Linux is a…

>Regarding the use in mobile and desktop, it will have to wait until SIMD extensions are introduced I'm little confused about this talk and comments in here relating to open source in high performance applications (desktop, servers etc). The RISC-V ISA is open source, I get that. There can also be open source Verilog/VHDL designs available. They are probably good for small low performance IoT applications and old pro…

> In other words, if you want competitive RISC-V chip, some company must spend hundreds of millions to develop their own RISK-V chip architecture...

I wonder if a country like Russia, wanting something that they can deploy without worrying that the NSA & Intel are cooperating on state spying, will eventually try and take something like this and bootstrap a domestic semiconductor line of business.

Re: Open-source chip RISC-V to take on closed x86, ARM CPUs

#116
post #13
post #9

Earlier quoted context omitted.

Apart from buying an actual dev kit like HiFive from SiFive, a great way to get into it is to buy SiFive's FPGA kits https://dev.sifive.com/freedom-soc/evaluate/fpga/ The FPGA board can be used for other things too. If you are really adventurous, I'd suggest buying a FPGA board with better chip so you can fit in larger IP blocks in the future. It will work perfectly fine as a replacement for the above FPGA kit I've l…

I see that what they recommend for the freedom platform https://www.sifive.com/products/freedom/ today, is a dev board https://dev.sifive.com/freedom-soc/evaluate/fpga/ that costs around 3500 USD: https://www.avnet.com/shop/us/p/kits-and-tools/development-k... Do anyone here know what kind of "classic pc" performance one is likely to get out of a board like that? Could you get on the order of low-end pc (~500 dollar…

The $3500 board is a lot, yes. There is also a $99 "Arty" board that is enough to run what is in the HiFive1, and I think even to add an MMU and run Linux. The $3500 one has enough space to do multiple cores, FPU and so forth as well.

Both the $99 and $3500 FPGA boards run a Rocket CPU at 65 MHz, which is pretty slow, though faster than you get with a software cycle-accurate simulator on a workstation.

Re: Open-source chip RISC-V to take on closed x86, ARM CPUs

#117
post #106

I want to buy RISC-V, both to play with and to support the cause. What are my options like and should I buy something now or wait for the next generation?

People mentioned the siFive option, but that's a microcontroller. If you were looking for a 64 bit processor implementation, without having to use an FPGA... It looks like the first dev board that would be capable of running linux will likely be the lowRISC project. "We are expecting to crowdfund an initial instantiation of the lowRISC platform during the course of 2017" http://www.lowrisc.org/

I'll buy a LoweRISC as soon as they have something for sale (and I have one of the first HiFive1s). But at the rate both organisations are progressing I expect to be able to get a quad core 1.6 GHz 64 bit RISC-V "Pi-like" board from SiFive before LowRISC. Possibly even this year. I've gathered from other things they've said that they're sampling wafers with that SoC about now.

Ideally, they'll both succeed.

Re: Open-source chip RISC-V to take on closed x86, ARM CPUs

#118

Earlier quoted context omitted.

The "Windows" you can run on a Raspberry Pi (ignoring anything involving X86 emulation) isn't a general-purpose OS. It's more like a deployment target for UWP/IoT apps that you write on a Windows 10 PC.

It's written in C. Why not a general purpose OS?

There are important people at Microsoft who basically get very confused about what "x86" or "arm" means. There was a contingent that decided allowing third parties to port win32 apps with a recompile was off the table (despite it being very doable - just look at explorer or notepad running on surface rt), and to this day whenever many MS folks make public statements about windows on arm they sound hopelessly confused.

Re: Open-source chip RISC-V to take on closed x86, ARM CPUs

#119

Earlier quoted context omitted.

>Regarding the use in mobile and desktop, it will have to wait until SIMD extensions are introduced I'm little confused about this talk and comments in here relating to open source in high performance applications (desktop, servers etc). The RISC-V ISA is open source, I get that. There can also be open source Verilog/VHDL designs available. They are probably good for small low performance IoT applications and old pro…

> In other words, if you want competitive RISC-V chip, some company must spend hundreds of millions to develop their own RISK-V chip architecture... I wonder if a country like Russia, wanting something that they can deploy without worrying that the NSA & Intel are cooperating on state spying, will eventually try and take something like this and bootstrap a domestic semiconductor line of business.

Russians have build their own processors for decades. They have used SPARC instructions sets and they also have their own VLIW Elbrus 64-bit ISA and processors are made by TSMC for 28 nm process. It has Intel x86 comparability with system-level dynamic translation.

Just adopting new Instruction Set Architecture (ISA) is not going to help to magically boost semiconductor business.

Re: Open-source chip RISC-V to take on closed x86, ARM CPUs

#120
post #76
post #43

Earlier quoted context omitted.

ARM is too license-encumbered. If we're going to switch away from x86, it might as well be to something that admits free development and production.

Things are not that straight forward, I wrote a better comment here: https://news.ycombinator.com/item?id=14284409

I'm aware that individual implementations of the ISA are nonfree. There's still a huge benefit to using the free ISA, because we can target nonfree hardware while necessary and our software will just work on free hardware when it's available. There are already some free low-power designs, and if RISC-V gains traction I expect some free high-power designs to come out of the woodwork.

A robust open processor ecosystem could be the impetus for a huge improvement in open-source EDA tooling and public EDA research. Even now, the absolute cutting edge in HDL research is free and open-source (and 100x more user-friendly than anything to come out of Xilinx or Altera), and I suspect the same would happen for silicon-targeting synthesis tools if there was a demand for it.

The idea would be to get 90% of Intel's performance for 5% of the work. Intel spends insane amounts of money on manual routing and optimization, extensive testing at every stage of prototyping and production, stuff like that. The creative laziness of the free software/hardware people could probably improve on that very substantially with minimal losses to the finished product.

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