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Open-source chip RISC-V to take on closed x86, ARM CPUs

computerworld.com.au

81–90 of 157 posts

Re: Open-source chip RISC-V to take on closed x86, ARM CPUs

#81
post #79
post #72

I see on this thread a lot of people getting blind-folded by the "open-source" term attached to the headline of this article. First of all RISC-V can mean more than one thing: it can refer to the architecture, which is in fact open and free to use, or it can refer to the implementation of the same architecture, which will not be necessarily free or open source. For example, check the so claimed SiFive company which w…

> You don't need to be completely tied to ARM. The point is that if you want to use the ARM ISA you have to pay ARM. Not so with RISC-V. Anyone is free to fab a RISC-V chip without paying royalties.

You are talking like you could download RISC-V from the internet and send it to the foundry for mass production without additional costs or effort.

RISC-V is just a document, is not an implementation. There are many costs involved into designing a CPU that end up costing much more money than paying a license fee.

Check this comment: https://news.ycombinator.com/item?id=14284450

Re: Open-source chip RISC-V to take on closed x86, ARM CPUs

#83
post #81
post #79

Earlier quoted context omitted.

> You don't need to be completely tied to ARM. The point is that if you want to use the ARM ISA you have to pay ARM. Not so with RISC-V. Anyone is free to fab a RISC-V chip without paying royalties.

You are talking like you could download RISC-V from the internet and send it to the foundry for mass production without additional costs or effort. RISC-V is just a document, is not an implementation. There are many costs involved into designing a CPU that end up costing much more money than paying a license fee. Check this comment: https://news.ycombinator.com/item?id=14284450

In that comment you say "RISC-V is thrown around like if it's an already working CPU but it is not" which is false since there are multiple existing, functioning RISC-V implementations in silicon (https://www.sifive.com/products/freedom/), FPGAs and software (https://bellard.org/riscvemu/).

Most people on HN should understand the difference between an ISA specification and its implementation in silicon.

Re: Open-source chip RISC-V to take on closed x86, ARM CPUs

#84

I thought that microprocessor production and design was fraught with risk of infringing on other designers' patents (even for original ISAs). I can see that industry heavyweights have arrived to support RISC-V, so hopefully that comes with a team of professors/lawyers that could defend them. But, why now? Why couldn't this have happened sooner? Didn't Sun try to create an open SPARC processor design? What does RISC-V…

> does anyone expect RISC-V to really go head-to-head with Xeon, Opteron, ThunderX, Centriq?

Yes, and no. RISC-V is disruptive [1] to both ARM and x86. But before it can run (compete with Intel CPUs), it needs to crawl (compete with low-end ARM CPUs/microcontrollers). It could take a decade or more before RISC-V competes at the high-end. Basically think of it as following ARM's path but on a much more accelerated path (for many different reasons: much larger chip market these days, being open source and royalty-free, etc).

[1] - https://www.youtube.com/watch?v=mbPiAzzGap0

Re: Open-source chip RISC-V to take on closed x86, ARM CPUs

#85
post #59

Earlier quoted context omitted.

>BigCo's like Apple or Samsung are probably ARM partners, so no per-design/unit fees. Nope, all ARM licensees pay a per-unit royalty, regardless of their partnership level[0]. Being the biggest might help Apple and Samsung negotiate a slightly lower royalty rate, but by the end of the day it's still at least 1% of the chip's selling price. [0] http://www.anandtech.com/show/7112/the-arm-diaries-part-1-ho...

> but by the end of the day it's still at least 1% of the chip's selling price. Right, but you cannot just consider the difference in royalty fees between ARM and another ISA. For example, the STM32F* chips cost between $0.60 (STM32F0) [0] and $19 (STM32F7) [1]. You can't just compare the royalty fee here when thinking of lost revenue for the manufacturer. The ARM ecosystem is huge, and if ST switched to another ISA,…

Bluespec, AMD, Qualcomm, IBM, NVidia, Micron, NXP, Samsung and a few dozen other companies are all dues paying members of the RISC-V foundation. I think it's possible for them to create a new ecosystem, just give them time.

Re: Open-source chip RISC-V to take on closed x86, ARM CPUs

#86
post #69

Earlier quoted context omitted.

The RISC-V team was very careful in establishing prior art for every design decision. The patents on ISAs tend to be on their quirks, so keeping things truly minimal helps avoid all of that complexity. Like a lot of what Sun did, prior open chip designs weren't good enough. Academics starting with a clean slate and a 20+ years of additional experience gives RISC-V real advantages over MIPS and ARM. The primary advant…

For the costs, they do not only get the license to use the ISA, but the whole processor design, as in the "source code" to the whole processor. As a licensee, you place that design together with any other electronics you create (or license separately) on a chip to create the device you want.

Perhaps I'm misreading your comment, but Samsung is designing its own CPU these days. It doesn't license ARM's Cortex CPUs anymore (at least for the Galaxy S/Note series) - basically it's doing what Qualcomm and Apple are doing, too.

Re: Open-source chip RISC-V to take on closed x86, ARM CPUs

#87

Earlier quoted context omitted.

Atm, arm is likely a better fit for that.

I wish ARM made all their manufactures use UEFI. Microsoft did for their phones, but the bootloaders are locked. All the other ARM devices are SoCs with random shit connected to random pins and non-upstreamable kernels. It's not a platform. For a new design to work, it really need to be a sold platform, with a spec and kernels that don't need per-device images to boot and run. Device trees help, but they're just not…

I'd rather they use Coreboot. UEFI is definitely coming "locked" to virtually all ARM-based devices, and my guess is Microsoft is at fault there, perhaps just by simply making it being locked the "default", and then the OEMs not bothering to change that.

Re: Open-source chip RISC-V to take on closed x86, ARM CPUs

#88
post #83
post #81

Earlier quoted context omitted.

You are talking like you could download RISC-V from the internet and send it to the foundry for mass production without additional costs or effort. RISC-V is just a document, is not an implementation. There are many costs involved into designing a CPU that end up costing much more money than paying a license fee. Check this comment: https://news.ycombinator.com/item?id=14284450

In that comment you say "RISC-V is thrown around like if it's an already working CPU but it is not" which is false since there are multiple existing, functioning RISC-V implementations in silicon ( https://www.sifive.com/products/freedom/ ), FPGAs and software ( https://bellard.org/riscvemu/ ). Most people on HN should understand the difference between an ISA specification and its implementation in silicon.

The tone of your comment is very unfortunate taking into account the content of it.

The second like you showed is just a simple FPGA implementation, you can't really use for ASIC designs.

The first one is a completely different implementation by a different company. And they are not really providing the whole source. I challenge you to find a place to download their designs yourself. I will be waiting.

Re: Open-source chip RISC-V to take on closed x86, ARM CPUs

#89

I always thought ARM chips were RISC. shows what I know

That's how they started out, but there is always pressure to add new instructions for niche markets. But since there isn't any coherent way to implement extensions it means they have to pollute the entire ISA. RISC-V was carefully designed to allow for extensions.

Re: Open-source chip RISC-V to take on closed x86, ARM CPUs

#90
AFAIK, most advanced RISC-V design includes superscalar and OoOE (e.g. comparable to a MIPS R10000 (1995) or an Intel Pentium Pro (1995)), while the RISC-V for the IoT is comparable to a typical single instructions per clock RISC CPU, e.g. MIPS R3000 (1988).

The success in the IoT will depend not only in a cheaper price because of no royalties, but also in the "ecosystem": peripherals, buses, etc. Running Linux is a huge start, so I have no doubt it can be a success in this field.

Regarding the use in mobile and desktop, it will have to wait until SIMD extensions are introduced, and software being adapted (e.g. ffmpeg/libav including RISC-V assembly SIMD implementation for the codecs).

Anyway, realistically, for the RISC-V getting enough traction, some big player should bet on that, which is currently highly improbable, unless some Apple/Samsung/Huawei/Google gets crazy enough for doing it.

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