Earlier quoted context omitted.
Have you seen "Stanford Seminar: Beyond Floating Point: Next Generation Computer Arithmetic"? https://www.youtube.com/watch?v=aP0Y1uAA-2Y
Well, I'm the guy in the black shirt who did the demo. If you liked that lecture, I'm already starting on some verilog implementations. This is an example multiplication 8 bit * 8 bit -> 16 bit unpacked (20 bits). It differs from standard floating point in that the fractions are stored as two's complement. It takes a little bit of wrapping your head around, but the hidden bit for negative numbers is actually -2 ! Mom…
Has there been much traction for getting major chip manufacturers to implement this? I know they're all looking for the next big thing and Intel is working on specialized neuromorphic chips. A general "drop-in" replacement for floating point seems like an opportunity for a general-purpose win from low-hanging fruit:
Intel Gets Serious About Neuromorphic, Cognitive Computing Future https://news.ycombinator.com/item?id=13623846