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Google says Rowhammer attacks are gaining range as RAM is getting denser

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Re: Google says Rowhammer attacks are gaining range as RAM is getting denser

#71
But while there are no known cases where Rowhammer attacks have been used in the real world

Not on purpose but I'm sure that either it or phenomenon like it are the causes of a lot of odd "glitchy" behaviour that people encounter, because systems are run so close to their limits that there are bound to be cases when they surpass the limits. I remember many years ago discovering that a system which passed the CPU and memory stress tests of the time 100% (ran many days), but would very reliably corrupt a particular .zip file's contents upon extraction; and no other that I could see. Turning down the FSB by 1MHz(!) was enough to make it stable again.

But I remain convinced that Rowhammer is a fundamental defect and all RAM which is susceptible to it should be recalled and replaced. It really says something about the industry when they've managed to convince memory testing tools to treat RH tests as "optional" and "not a real concern, most RAM will show errors" when the discovery first came to light. 26 years ago, Intel offered to recall and replace processors that couldn't divide, after an initial period of reluctance, but only once the bad publicity started. Can RAM manufacturers be coerced into doing the same, and perhaps even go back to pre-Rowhammer process sizes? Sacrificing correctness should never be an option.

(This post made from a 10+-year-old machine containing RAM that is perfectly free of Rowhammer.)

Re: Google says Rowhammer attacks are gaining range as RAM is getting denser

#73

But while there are no known cases where Rowhammer attacks have been used in the real world Not on purpose but I'm sure that either it or phenomenon like it are the causes of a lot of odd "glitchy" behaviour that people encounter, because systems are run so close to their limits that there are bound to be cases when they surpass the limits. I remember many years ago discovering that a system which passed the CPU and…

ECC Ram would mitigate some these impacts at least. But yes, it's ridiculous.

Some memory sticks I buy get corrupted bits at rated speeds for my memory heavy workloads.

Crucial (micron) would always accept the warranty claim, but Corsair has tried rejecting multiple claims saying their memory is designed for gaming.

Now I decided to finally pay the xeon tax and go ecc memory. Yes, I know AM4 had "ecc support", but even on asrock motherboards it doesn't necessarily work.

Re: Google says Rowhammer attacks are gaining range as RAM is getting denser

#74

But while there are no known cases where Rowhammer attacks have been used in the real world Not on purpose but I'm sure that either it or phenomenon like it are the causes of a lot of odd "glitchy" behaviour that people encounter, because systems are run so close to their limits that there are bound to be cases when they surpass the limits. I remember many years ago discovering that a system which passed the CPU and…

The problem isn't RowHammer, the problem is lack of ECC. This is mostly Intel's fault, as they cripple their consumer CPU lines to disable ECC for market segmentation purposes.

The entire premise that we can store tens of gigabytes of information reliably in tiny silicon capacitors without any error detection or correction whatsoever is ludicrous. Every other storage technology uses advanced error correction - NAND Flash, HDDs, optical media, etc. We've been doing this for decades. Even floppies at least had error detection (checksums). All high speed transmission protocols also do error detection and re-transmission, except HDMI (because I guess nobody cares about the odd corrupted pixel). Same for anything going over radio.

Once you have ECC, your error rate margin goes up by many orders of magnitude. Worst case these attacks turn into a DoS as ECC fails to correct a badly corrupted word, and most of the time it will just work. Plus you can detect attack attempts as the memory controller will report increased error rates.

It's not possible to design modern RAM that is perfectly reliable. That's just physics. We know how to solve this problem. We just aren't doing it because Intel thinks consumers don't deserve reliable RAM. The only other option is doing ECC on-chip in the RAM itself, and that has other efficiency trade-offs which probably make it not worth it, at least not with DDR style interfaces (it might've made sense in an FB-DIMM style world where the memory controller is in the RAM)

Re: Google says Rowhammer attacks are gaining range as RAM is getting denser

#75

But while there are no known cases where Rowhammer attacks have been used in the real world Not on purpose but I'm sure that either it or phenomenon like it are the causes of a lot of odd "glitchy" behaviour that people encounter, because systems are run so close to their limits that there are bound to be cases when they surpass the limits. I remember many years ago discovering that a system which passed the CPU and…

> no known cases

Is there any way to get a sense for how meaningful this is? Like, is it a pretty sure bet that no attack has happened? Or, if an attack has happened, it's likely been targeted state-sponsored? Or, is it every time you deploy on a multi-tenant host (e.g., ec2), you're playing Russian roulette?

Re: Google says Rowhammer attacks are gaining range as RAM is getting denser

#76

Earlier quoted context omitted.

Can Rowhammer bypass ECC and not be detected by an hw_event_mc_err_type ? I don't think so. Why would someone have ECC without a sufficiently sophisticated driver?

> Why would someone have ECC without a sufficiently sophisticated driver? Have you, personally, tested your servers to make sure the driver correctly handles bit errors? Can't say I have.

Last time I tested such things, they handled ECC correctly (x86 and arm).

Re: Google says Rowhammer attacks are gaining range as RAM is getting denser

#77

So it sounds like security related flags need to be more than a single bit, and should probably be stored in different variables

I imagine the silent downvotes are because that’s trying to solve the problem at the wrong layer.

For your suggestion to work, you’d need to also duplicate the logic that checks the redundant bits, etc, etc.

If you really want to do this, you end up doing what satellites do to deal with cosmic rays:

Ship three identical computers. If state diverges, majority rules. See page 9 (Radiation-Effects Mitigation and Hardness) for an FPGA example:

https://www.xilinx.com/support/documentation/white_papers/wp...

Re: Google says Rowhammer attacks are gaining range as RAM is getting denser

#78

But while there are no known cases where Rowhammer attacks have been used in the real world Not on purpose but I'm sure that either it or phenomenon like it are the causes of a lot of odd "glitchy" behaviour that people encounter, because systems are run so close to their limits that there are bound to be cases when they surpass the limits. I remember many years ago discovering that a system which passed the CPU and…

Chrome gave me a segfault crash message I've never seen before by simply visiting youtube this morning.

I thought for a moment what the most likely explanation was, given Chrome has surely seen a boatload of stability testing. It's a sandbox viewing a website. A segfault?!

I wonder if it's cosmic rays on my non ECC RAM or some accidental rowhammer moment.

Re: Google says Rowhammer attacks are gaining range as RAM is getting denser

#79

Earlier quoted context omitted.

Yes. Intel is an industry leader. EFI, Thunderbolt, and the "ultrabook" product category are all their ideas. By adding a feature to their CPU products, they induce demand for anything that complements it. By putting ECC support into their highest-end mobile CPUs only, they made them into high-end luxuries instead of industry standard. https://ark.intel.com/content/www/us/en/ark/search/featurefi...

As others have mentioned, ECC is nothing more than a bandaid for what is ultimately a defective product.

I don't think that's true at all. ECC wasn't designed specifically with this attack in mind, and it's still a pretty effective mitigation.

There's nothing defective about RAM, it's never going to be the case that errors won't happen, it's just that before we were worried about heat and radiation and now we have to worry about attackers too.

Re: Google says Rowhammer attacks are gaining range as RAM is getting denser

#80

But while there are no known cases where Rowhammer attacks have been used in the real world Not on purpose but I'm sure that either it or phenomenon like it are the causes of a lot of odd "glitchy" behaviour that people encounter, because systems are run so close to their limits that there are bound to be cases when they surpass the limits. I remember many years ago discovering that a system which passed the CPU and…

The problem isn't RowHammer, the problem is lack of ECC. This is mostly Intel's fault, as they cripple their consumer CPU lines to disable ECC for market segmentation purposes. The entire premise that we can store tens of gigabytes of information reliably in tiny silicon capacitors without any error detection or correction whatsoever is ludicrous. Every other storage technology uses advanced error correction - NAND F…

ECC is at best a temporary workaround, and at worst an implicit approval of the creation of defective products. It's purpose is to prevent transient bitflips due to cosmic rays and such, not consistently reproducible errors from what is otherwise perfectly normal operation.

Plus you can detect attack attempts as the memory controller will report increased error rates.

Now you've turned specific access patterns into "attack attempts", and by discriminating against them as such, entirely destroyed a fundamental part of general-purpose computing. What's next, CPUs that are only guaranteed to do certain operations correctly, and everything else is considered an "attack"? That is NOT a direction that we should be heading. Hell fucking no!!!

RAM should always hold what was last written to it, under all conditions of software accesses. To expect or imply that anything less is acceptable, is to destroy one of the foundations on which general-purpose computing is built.

NAND Flash

Where manufacturers are trying to sell 2-4x the capacity with 1/4 to 1/16th of the endurance? That's a rant for another thread...

We know how to solve this problem.

This problem didn't exist 15 years ago. It only got created because the RAM companies have forsaken correctness, and somehow managed to convince everyone else that it's not their own fault.

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