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I don't know anything about RISC-V ISA yet, but I am wondering if its ISR is great for learning computer architecture in shcools compared to MIPS, the dominant ISR at colleges for introductory computer architecture classes? The HDL (Verilog) code looks quite short and simple. If the partial implementation of the ISR implementation is like that it shouldn't be so bad for learning...
> works up to 75MHz How much would this increase if it used an ASIC instead of FPGA? And how much would it cost for different batch-sizes?
> how much would it cost
A CPU IC isn't very interesting until it has some I/O, so it's much more meaningful to talk about an SoC with one or more of these darkriscv cores.
Sorry, I don't have an answer other than to say "this isn't quite complete enough for it to be useful for most tasks." That said, there's probably tons of open source implementations of DDR/SPI/PCI/USB interfaces (on opencores.org, e.g.). So it's "only" a matter of integrating these.
Earlier quoted context omitted.
It isn't the telemetry that's slowing us down, but layers upon layers of (mostly needless) abstraction and buffer bloat. Windows 95 had most of the things we use in a GUI environment today and it ran on a 486 with 8MB of ram. When packaged in Electron with a javascript x86 emulator it is still smaller than many modern text editors. Plenty of GUIs ran on significantly less. Since the modern web is basically one of the…
What layers of abstraction are we stacking? Sure, there's electron/v8, but that's just one layer. You said yourself that notepad in an electron-based x86 VM is still pretty small, so clearly electron itself isnt the problem. Maybe people just demand more from their software these days, and all these little conveniences just add up more than you'd realize? That would also explain why the system is not "doomed in the e…
Laggy response times in aforementioned text editors, frivolous UI animations on certain OSs, terrible web apps like JIRA...
The complexity doesn't necessarily mean better software. It's quite often worse along many dimensions: performance, usability, maintainability, portability.
IIRC this isn't the first open source RISC-V core but it's great to see another implementation.
> works up to 75MHz How much would this increase if it used an ASIC instead of FPGA? And how much would it cost for different batch-sizes?
This is good news for risc-v! The fact that it can be implemented so easily by hobbyists furthers the cause of trusted hardware. Sure, it won't be implementable by hobbyists at the speeds necessary for modern desktop computing, but a trusted security core (something like a yubikey) could be implemented on completely from-scratch hardware, but then still use existing trusted/vetted software (openssl), just a cross-com…
"Modern" desktop computing is perhaps less resource hungry than you think when you cut away so much graft of telemetry. None or barely few games, of course. But word processing, email, and pure HTML browsing without javascript? Maybe not HTML5's fancy features, but general rich text? I think it's very achievable.
Maybe less, should specific purpose assists be available.
And RAM address space sufficient to contain the tasks.
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> pure HTML browsing without javascript I highly doubt this is achievable now. Turn on NoScript and vast majority of web sites just refuse to work not even properly, but to just load the content.
Then don't use shit websites that require javascript.
I actually like/need to use websites that use javascript, imagine that
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My software "stack" hasn't changed in maybe 15 years now. It's emacs + firefox + terminal and a couple utilities here and there. It ran fine on my first computer with a single core ~1GHz CPU and 128MB of RAM (although multi-core architectures and more RAM did make it a lot easier to multi-task later). The only reason I upgrade my computer these days is to run modern games, for everything else except compilation I cou…
I don't know what "prohibitvely expensive" is in your case, but there's a possibility today: Grab one HiFive Unleashed for $999 [1]: - 4 cores up to 1.5Ghz - 8Gb DDR4 ECC Ram - 1Gbps ethernet Then grab one HiFive Unleashed Expansion Board for $1,999 [2]: - SSD M.2 Connector - SATA3 Connector - x16 PCIE Connector (4 lanes of pcie2) - A bunch of other cool stuff you wouldn't probably use (SPI, FPGA, etc.) Finally grab…
I wonder how easy it would be to port https://github.com/xoreaxeaxeax/sandsifter to the RISC-V instruction set. Would probably be a decent step in the right direction for validating/verifying the future of trusted computing. Although... this gives rise to a 2nd thought. If it was _this easy_ to build a RISC-V implementation, is it all that special, technically speaking? I ask as someone naive about processor design.…
https://www.anandtech.com/show/13199/hot-chips-2018-samsungs...
The advantage of working with RISC-V over ARM right now is that you can configure a RV core to have far less capability than an ARM core. You can license RTL from SiFive for RV64imc (64-bit address and data, baseline integer instruction set, hardware multiply, and 16-bit compressed instructions). Such a core simply does not exist in the ARM marketplace today, partially because NEON is mandatory in ARMv8.
> works up to 75MHz How much would this increase if it used an ASIC instead of FPGA? And how much would it cost for different batch-sizes?
IIUC it's critically dependent on the manufacturing process used. > how much would it cost A CPU IC isn't very interesting until it has some I/O, so it's much more meaningful to talk about an SoC with one or more of these darkriscv cores. Sorry, I don't have an answer other than to say "this isn't quite complete enough for it to be useful for most tasks." That said, there's probably tons of open source implementation…