A third world engineer responds to “RISC-V: They should have known better” • Hacker News Board

Re: A third world engineer responds to “RISC-V: They should have known better”

#301

Post by zephen » Mon, Aug 17, 2026, 1:37 PM UTC

sylware wrote: post #290

zephen wrote: post #211

Earlier quoted context omitted.

Hard to know at this point. In the past ARM sued people for daring to think about implementing ARM compatible computers. (Even university research projects.) Of course, in the more distant past, AMD and Intel sued each other a lot. But there have been a dozen or so x86 market entrants. I think the competition has just been brutal. So, with either one, you could, of course, do a clean-sheet design and hope you don't g…

Allright, you did describe a monstruous IP mine-field. No way anybody could reasonably use anything else than RISC-V.

Bleeding edge processor development is always going to be a patent minefield, even for RISC-V. Most patents are broad enough to cover more than one architecture.

But there are now several RISC-V IP vendors, and ARM can't possibly shut them all down, and companies can develop IP in-house, so there are lots of different designs already out there.

So, at this point, developing a RISC-V processor provides a certain amount of safety in numbers, kind of like swimming in a school of fish, while developing an ARM compatible processor paints a target on your back.

Developing a low-end x86 processor wouldn't attract any legal attention either, but now that the RISC-V ecosystem is big enough, why bother? Decoding all those instructions might be a lot of extra work for no real market share gain.

Developing a high-end x86 processor would probably attract careful scrutiny of exactly how you managed to get that performance and whether you violated any patents to do that. Again, that the same sort of patent scrutiny would happen with bleeding edge RISC-V, but certainly, a fast x86 processor would be higher on the priority list of the Intel and AMD legal departments.

Re: A third world engineer responds to “RISC-V: They should have known better”

#302

Post by bluGill » Mon, Aug 17, 2026, 1:46 PM UTC

ajsnigrutin wrote: post #270

crote wrote: post #261

Earlier quoted context omitted.

> They're probably produced in far greater numbers than most off-the-shelf STM32 or CH32V chips. I highly doubt it. The RP2xxx lacks the built-in functionality for use in, say, a car, and it isn't cheap and fully-integrated enough for dime-a-dozen gadget application. They are great for hobbyists due to their low barrier to entry, but there really isn't a niche they serve when it comes to mass-produced electronics.

> They are great for hobbyists due to their low barrier to entry, but there really isn't a niche they serve when it comes to mass-produced electronics. This. Just programming a microcontroller is generally a pain, but a pain that hardware manufacturers can deal with, because they have employees with experience, who can read the long datasheets, get proper programmers and run the manufacturers software packages to pro…

The real thing manufactures do is ensure that the SBC is available as long as they want it. My company started an embedded controller 6 years ago, at that time we got a contract from manufactures that all the parts would be available for 12 years, thus ensuring we won't have to redo that controller for 3-4 more years (and we might just renew the contracts). As a hobbyist you don't have that guarantee (except the 3 you named) it happens all too often you buy something only to discover not enough other hobbyists have the same board to give it a critical mass of people to make it work. It can still work, but you will personally have to do all the work to make it keep running which few hobbyists have the time/energy for (and often the deep technical knowledge is lacking as well)

Re: A third world engineer responds to “RISC-V: They should have known better”

#303

Post by bjackman » Mon, Aug 17, 2026, 1:47 PM UTC

SuchAnonMuchWow wrote: post #297

bjackman wrote: post #272

Earlier quoted context omitted.

> too much fragmentation to make binary distribution feasible Sorry I haven't actually read the original article so this is a bit of a driveby. But, I'm skeptical of this? Surely whichever cloud platform first offers RISC-V compute, the next cloud platforms will ship a CPU that's compatible. Probably they'll be RFTing the same CPU vendors and they won't need to coordinate explicitly for this to happen. Then everyone…

I'm not completely sure, but are cloud versions of the distros actually recompiling the packages ? I though it was mostly: "select a minimal set of packages needed for docker and co", not "recompile all the packages you want in your distro".

Don't know actually, it might be I they are just putting cloud-init in, installing their VM agents, and maybe like tweaking the bootloader setup and kernel cmdline or something. But equally, they might be compiling it themselves so they don't have to trust distros' build farms so much.

But anyway I don't think it matters. The hard part here is having a distro image supply chain, not compiling stuff. If they do need to start compiling loads of stuff they didn't before... They just need to add CPUs.

Re: A third world engineer responds to “RISC-V: They should have known better”

#304

Post by hylaride » Mon, Aug 17, 2026, 1:59 PM UTC

LeFantome wrote: post #221

andai wrote: post #146

Earlier quoted context omitted.

Interesting. So I've seen a lot of reviews of RISC-V machines and they seem to be a decade or more behind in terms of performance. I always thought that was a case of "the tech is still catching up",[0] but it sounds like there are fundamental issues that prevent performant implementations? If so... I heard China was investing heavily in RISC-V, which implies that either they're going to have to settle for permanentl…

> China was investing heavily in RISC-V, which implies that either they're going to have to settle for permanently crippled perf Not quite. RISC-V application class processors are a new development. They are starting from behind but they are improving faster than the competition. The SpacemiT K3 is 4 times faster than the K1 for example. The Alibaba C950 will be about Apple M1 level performance. And even faster desig…

My understanding is that RISC-V needs both economies of scale AND chips that are manufactured at the bleeding edge fabs (smallest dies, etc) which is a lot more expensive. It's a chicken and egg problem as there's not (yet?) demand. The architectural limitations will remain until there's incentive to work on it.

In many ways it's not much different than Linux was in the 1990s. It was cheap and useful, but often not as performant as commercial OSes (UNIX or even windows) until big corporate money came in and started piling resources into it. Distribution fragmentation was also an issue, which could still cause headaches for RISC-V (especially if some companies start adding proprietary performance extensions that others can't). So I think it remains to be seen how RISC-V will pan out (eg will the cloud vendors see enough of an ROI supporting it for higher end computing than buying ARM licences).

Re: A third world engineer responds to “RISC-V: They should have known better”

#305

Post by random3 » Mon, Aug 17, 2026, 2:09 PM UTC

kreelman wrote: post #215

random3 wrote: post #189

Earlier quoted context omitted.

Can you list the actual chips you’re referring to and additional sources to follow? I’ve finally started playing with ESP32 and recently getting curious about the smallest possible things out there. Also

Here's the CH32v003, https://github.com/openwch/ch32v003 These are pretty low end and are fairly available at low cost. Here's a youtube of someone talking through some of the the CH32 boards, https://www.youtube.com/watch?v=Kss6WQvJbRs He talks about them being the "10c/chip" chip. Then, there is the CH32v303 https://www.wch-ic.com/products/CH32V303.html , which is the lower end of the chips that support minimal flo…

thank you!

Re: A third world engineer responds to “RISC-V: They should have known better”

#306

Post by initramfs » Mon, Aug 17, 2026, 2:10 PM UTC

Conan_Kudo wrote: post #296

jabl wrote: post #294

Earlier quoted context omitted.

Yes, but compared to RISC-V neither OpenSPARC nor OpenPOWER are really going anywhere. Not really sure why, maybe the lawyers read the fine print about the level of openness they actually provide and decide that nope, not gonna touch that one? Technically just looking at the ISA both SPARC and POWER seem fine enough. So why is nobody interested? (Talos is interesting but not really an answer to the question, as it se…

OpenSPARC is under the GPL, which is probably why it didn't go anywhere directly . OpenPOWER is under permissive creative commons licenses, and people are iterating on the open source cores released by them. But the arrangement with efabless didn't go anywhere, and the company shut down last year without warning. So there's nowhere to experiment with producing chips.

https://wafer.space allows chips but I think tinytapeout became what efabless was doing: https://chipfoundry.io/

Also Hitachi's SH-2 & SH-4 patents expired in 2016, so J-core picked up where they left off: https://j-core.org/

MIPS also went open source around 2018: https://www.datacenterknowledge.com/data-center-hardware/mip...

Re: A third world engineer responds to “RISC-V: They should have known better”

#307

Post by drbscl » Mon, Aug 17, 2026, 2:28 PM UTC

strenholme wrote: post #187

I believe there will come a day when RISC-V has comparable or better performance than ARM and x86_64. This is based on history: I remember when x86 performance compared to the DEC Alpha, PA-RISC, SPARC, etc. was a joke. There was a time when, if you wanted real performance, you needed to pony up $20,000-$50,000 for a workstation with a MIPS/PA-RISC/SPARC/Alpha/whatever processor. All these workstations smoked the x86…

> It has been only in the 2020s that RISC processors have gotten x86_64 levels of performance, notably in the the Apple M series of processors

It's worth keeping in mind that modern ARM isn't really all that _RISC_, number of instructions in these chips is starting to approach x86_64 territory pretty fast

Re: A third world engineer responds to “RISC-V: They should have known better”

#308

Post by fleroviumna » Mon, Aug 17, 2026, 2:53 PM UTC

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Re: A third world engineer responds to “RISC-V: They should have known better”

#309

Post by ndiddy » Mon, Aug 17, 2026, 3:24 PM UTC

bjackman wrote: post #273

K0balt wrote: post #185

Earlier quoted context omitted.

First, im a big fan of what riscV has brought into the world; 0.50 cent processors with radios that can reach a kilometer, 8 cent MCUs that you can put anywhere because they are basically free, 8 dollar Linux computers, and 1 dollar WiFi nodes that can run reasonable applications. And also, the first application capable chip you can actually trust to be free of unpublished capabilities. RiscV is going to win despite…

> RiscV is going to win despite its limitations, simply because they can be worked around freely, and the cost per core is zero. This feels right to me. I've worked on embedded systems and OS my whole career and it just doesn't really feel like riscv wins or loses on technical merit to me. Boots-on-the-ground engineers might grumble but the decisions that matter here just aren't made by them. Otherwise why would we s…

You're agreeing with the conclusion the original article makes:

> None of this is to say that RISC-V is doomed. As I said, I fully expect it to take over the space currently occupied by 8051 as a typical cheap embedded core instantiated when some small amount of logic is needed, or some beefy accelerator or DMA engine needs some mild babysitting. Much like the linux kernel -- the price is right. ARM wants licensing fees, while the RISC-V spec is free, and (this part is key) there are cores out there which can be licensed for free. For situations where performance is not a factor and price is, RISC-V will win simply due to its price. "Good-enough" is a low bar in this case, and RISC-V is of the right height to meet it. And look, this market is not glorious, but it matters and it needs new blood. However, it is important that RISC-V not accidentally think it was chosen for being good. It needs to internalize that it was chosen for being cheap. This is not meant as an insult to cheap small cores -- I've written plenty of assembly for all sorts of shitty cores with shittily designed ISAs. RISC-V is an improvement over PIC and 8051, as little of a compliment as that is.

RISC-V may be suboptimal, but it's a lot better than 8051 and you can use GCC instead of having to buy Keil licenses for all your developers. Meanwhile at the higher end (desktops and higher-end SBCs), you'll still have to pay for a quality out-of-order core even if the ISA is free, and you have to deal with binary compatibility being more important. I can see RISC-V being a massive success on the low end, and displace 8051 and maybe Cortex-M0. However, I don't think this means that it'll be able to displace ARM64 on the high end.

Re: A third world engineer responds to “RISC-V: They should have known better”

#310

Post by ndiddy » Mon, Aug 17, 2026, 3:53 PM UTC

mrheosuper wrote: post #245

acutelittlebox wrote: post #236

Earlier quoted context omitted.

i think the part that you're missing is that this is what it's like for him and people in similar regions where a huge amount of things aren't an option to begin with and many more things are far more expensive than in the US or Europe. a lot of the article is about how the best part about RISC-V is that the chips and tools are available to more of the world.

I also live in 3rd country, and i know the pain. But if you can access to RISC V IC/tools, you can access ARM IC/tools. The Chinese basically spams those ARM IC as many(if not more) as RISC V IC. To me the author tried to hate ARM for no reason.

Yeah you can get <$1 STM32 dev boards and <$4 ST-Link dongles off Aliexpress. At my last job, we kept a big bag of the ST-Link dongles in the office, then whenever someone needed to debug something they could just keep the dongle attached to that board from that point on. It was a lot more convenient than having a single expensive debugger that you had to connect and disconnect.