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A third world engineer responds to “RISC-V: They should have known better”

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Re: A third world engineer responds to “RISC-V: They should have known better”

#271

Post by throwaway2037 »

K0balt wrote: post #185
ndiddy wrote: post #66

I think he's kind of speaking past the original author. The original piece is basically about how the author doesn't think that RISC-V will take off outside embedded, because of some design decisions that lead to poor performance compared to ARM64 and because so much of the ISA being optional means that there's too much fragmentation to make binary distribution feasible. Meanwhile, this piece is mainly about how RISC…

First, im a big fan of what riscV has brought into the world; 0.50 cent processors with radios that can reach a kilometer, 8 cent MCUs that you can put anywhere because they are basically free, 8 dollar Linux computers, and 1 dollar WiFi nodes that can run reasonable applications. And also, the first application capable chip you can actually trust to be free of unpublished capabilities. RiscV is going to win despite…

    > And also, the first application capable chip you can actually trust to be free of unpublished capabilities.
I am not in the embedded space. Can you explain your thinking behind this comment?

Re: A third world engineer responds to “RISC-V: They should have known better”

#272

Post by bjackman »

ndiddy wrote: post #66

I think he's kind of speaking past the original author. The original piece is basically about how the author doesn't think that RISC-V will take off outside embedded, because of some design decisions that lead to poor performance compared to ARM64 and because so much of the ISA being optional means that there's too much fragmentation to make binary distribution feasible. Meanwhile, this piece is mainly about how RISC…

> too much fragmentation to make binary distribution feasible

Sorry I haven't actually read the original article so this is a bit of a driveby.

But, I'm skeptical of this? Surely whichever cloud platform first offers RISC-V compute, the next cloud platforms will ship a CPU that's compatible. Probably they'll be RFTing the same CPU vendors and they won't need to coordinate explicitly for this to happen. Then everyone else building RISC-V servers will essentially be forced to align on the "AWS variant" or whatever.

So yes you'll need a -cloud build of the distro you use but most people are already doing that and the cloud platforms are already providing the infra for distros to ship it (I assume they are also contributing to the -cloud distro builds directly).

RISC-V laptops and phones I could see this being an issue but for server compute it feels like there's gonna be a Schelling point.

(Actually, for phones can't Google just fix this by fiat?)

Re: A third world engineer responds to “RISC-V: They should have known better”

#273

Post by bjackman »

K0balt wrote: post #185
ndiddy wrote: post #66

I think he's kind of speaking past the original author. The original piece is basically about how the author doesn't think that RISC-V will take off outside embedded, because of some design decisions that lead to poor performance compared to ARM64 and because so much of the ISA being optional means that there's too much fragmentation to make binary distribution feasible. Meanwhile, this piece is mainly about how RISC…

First, im a big fan of what riscV has brought into the world; 0.50 cent processors with radios that can reach a kilometer, 8 cent MCUs that you can put anywhere because they are basically free, 8 dollar Linux computers, and 1 dollar WiFi nodes that can run reasonable applications. And also, the first application capable chip you can actually trust to be free of unpublished capabilities. RiscV is going to win despite…

> RiscV is going to win despite its limitations, simply because they can be worked around freely, and the cost per core is zero.

This feels right to me. I've worked on embedded systems and OS my whole career and it just doesn't really feel like riscv wins or loses on technical merit to me.

Boots-on-the-ground engineers might grumble but the decisions that matter here just aren't made by them. Otherwise why would we still be using x86 so much?

I've worked on platforms that had barely-functional CPUs, we had to regularly be in touch with the engs that implemented them and they'd regularly go "oh yeah you've found a bug in our memory subsystem". This was kinda annoying for us but those CPUs were cheap as fuck and that opened up business models that weren't otherwise available. This is always gonna be more important than "ah but the CPUs are suboptimal!!"

Re: A third world engineer responds to “RISC-V: They should have known better”

#274

Post by mrheosuper »

codebje wrote: post #199
kelnos wrote: post #159

Earlier quoted context omitted.

Sure, but that problem should exist for both ARM and RISC-V. And if it doesn't yet, it will once RISC-V becomes more popular.

Maybe. There's less wiggle room though. You can't make a clone of a WCH, ESP32, GD32V, or RP2040 at a low enough price point to really profit from the gap. If Quintauris successfully makes a RISC-V range for automotive use, there'd probably be margin to clone those and sell at a profit, but skirting automotive certification regulations is a high-risk game that (hopefully!) doesn't have many buyers. If they make an Io…

I think the parent's point is, cheap MCU will have quirk no matter it's ARM clone mcu or RISC V MCU. Most of the time, the quirk exists in peripheral, not cpu core

Re: A third world engineer responds to “RISC-V: They should have known better”

#275

Post by camel-cdr »

ben-schaaf wrote: post #266
LeFantome wrote: post #197

Earlier quoted context omitted.

SiFive P870 and Tenstorrent Ascalon are pretty much Zen 3. Tenstorrent is supposed to be releasing silicon soon. You can license their cores now. SiFive says customers have the P870 already but I am not sure who those are.

I've seen this claimed before, and just going by SiFive's specint claims the P870 at 2.6GHz should match Zen 3. But for SiFive's last silicon, the HiFive Premier P550, they claimed a specint2006 of 8.65/GHz. That should put the silicon only about 20% slower than an intel i5-6400. But if you look at geekbench scores it's about an order of magnitude slower. Correct me if I'm wrong, but Tenstorrent has yet to ship any o…

The P870 is probably faster than the Cortex-X1 in my phone, which would put it on a similar per level to Zen1.

When I had brief access to a very early P870 devboard running at 2GHz it scored 2% worse than an 2.86GHz Cortex-X1 in the 7-zip benchmark compression (it was a 40% worse in decompression, but that has NEON optimized Arm assembly path and non for RISC-V). Because this was very early hardware still in bringup I expect them to get closer to the announced 2.7GHz.

But yeah, the RISC-V geekbench scores of publically available RISC-V processors are suprizingly low and idk why. Part of it is the lack of RVV support is certain workloads, but that doesn't explain the entire gap. When I looked at ST scalar performance my self it looked more comparible to similarly sized Arm CPUs.

I think I'll have to order a Pi5 (Cortex-A76) and investigate where it performes different to the SpacemiT K3 (SpacemiT X100).

On paper they should be very similar, both 2.4GHz, 4-wide decode, 3xALU, 1xBranch, (although the A76 has those on 4 execution units, while the X100 has 3 with one sharing ALU and Branch support), 2x load/store, 2xFP. The biggest obvious difference (appart from ISA), may be the cache setup after L1, with the K3 having a 4Mib L2 shared between 8 cores (no L3) and the Pi5 having a 512KiB L2 and a 2MB L3 shared between 8 cores.

Re: A third world engineer responds to “RISC-V: They should have known better”

#276

Post by HexDecOctBin »

rurban wrote: post #256
HexDecOctBin wrote: post #248

Earlier quoted context omitted.

Why is that? Is it simply a matter of scale (not enough shipping containers leaving from India to Trinidad and Tobago)?

In case of the China -> Europe and US routes it's certainly that the air fright traffic is heavily optimized and subsidized by China. From India obviously not, so you have to pay normal shipping costs.

So primarily state intervention then?

Re: A third world engineer responds to “RISC-V: They should have known better”

#277

Post by etiennebausson »

adastra22 wrote: post #151
kelnos wrote: post #102

I don't really understand the author's conclusions about cost and shipping, and how RISC-V is cheaper and more accessible to people outside the US and Europe. He first talks about how getting $1 worth of chips can cost $60-$200 in shipping for him due to his location... but then by the end claims that RISC-V gives him "an architecture that arrives in my country at ten cents a part". I don't get how both things can be…

[flagged]

Using AI to help you write an article in a language that you have not mastered does not mean the subject of the article is worthless.

I do not know if Claude was used, but I do appreciate the perspective regardless.

Re: A third world engineer responds to “RISC-V: They should have known better”

#278

Post by znpy »

K0balt wrote: post #185
ndiddy wrote: post #66

I think he's kind of speaking past the original author. The original piece is basically about how the author doesn't think that RISC-V will take off outside embedded, because of some design decisions that lead to poor performance compared to ARM64 and because so much of the ISA being optional means that there's too much fragmentation to make binary distribution feasible. Meanwhile, this piece is mainly about how RISC…

First, im a big fan of what riscV has brought into the world; 0.50 cent processors with radios that can reach a kilometer, 8 cent MCUs that you can put anywhere because they are basically free, 8 dollar Linux computers, and 1 dollar WiFi nodes that can run reasonable applications. And also, the first application capable chip you can actually trust to be free of unpublished capabilities. RiscV is going to win despite…

8 dollar linux computers were a thing before riscv as well btw, i remember buying 50 chip computers (9$ at the time) for my university linux users group.

Re: A third world engineer responds to “RISC-V: They should have known better”

#279

Post by RobotToaster »

throwaway2037 wrote: post #271
K0balt wrote: post #185

Earlier quoted context omitted.

First, im a big fan of what riscV has brought into the world; 0.50 cent processors with radios that can reach a kilometer, 8 cent MCUs that you can put anywhere because they are basically free, 8 dollar Linux computers, and 1 dollar WiFi nodes that can run reasonable applications. And also, the first application capable chip you can actually trust to be free of unpublished capabilities. RiscV is going to win despite…

> And also, the first application capable chip you can actually trust to be free of unpublished capabilities. I am not in the embedded space. Can you explain your thinking behind this comment?

It's widely suspected that the Intel management engine[0] and their equivalents are NSA backdoors

[0] https://www.eff.org/deeplinks/2017/05/intels-management-engi...

Re: A third world engineer responds to “RISC-V: They should have known better”

#280

Post by mike_hearn »

bjackman wrote: post #273
K0balt wrote: post #185

Earlier quoted context omitted.

First, im a big fan of what riscV has brought into the world; 0.50 cent processors with radios that can reach a kilometer, 8 cent MCUs that you can put anywhere because they are basically free, 8 dollar Linux computers, and 1 dollar WiFi nodes that can run reasonable applications. And also, the first application capable chip you can actually trust to be free of unpublished capabilities. RiscV is going to win despite…

> RiscV is going to win despite its limitations, simply because they can be worked around freely, and the cost per core is zero. This feels right to me. I've worked on embedded systems and OS my whole career and it just doesn't really feel like riscv wins or loses on technical merit to me. Boots-on-the-ground engineers might grumble but the decisions that matter here just aren't made by them. Otherwise why would we s…

We use x86 because the implementations are fast and there's so much software encoded with it. This makes up for the problems of the design. RISC-V doesn't have either of those advantages, though.
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