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Intel Reinvents Transistors Using New 3-D Structure

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Re: Intel Reinvents Transistors Using New 3-D Structure

#31

Post by ableal »

jws wrote: post #17

This Intel R&D paper sums the technology up and has a picture that makes it clear what they are doing: http://www.intel.com/technology/silicon/integrated_cmos.htm In a nutshell, the drain/source is a tall trace, the gate approaches from the side and climbs over the drain/source, covering it on three sides.

The good stuff (discretely linked from the press release) is here: http://newsroom.intel.com/docs/DOC-2032 . In particular, this PDF has color drawings of the devices, and SEM pictures: http://download.intel.com/newsroom/kits/22nm/pdfs/22nm-Detai...

It is as you said - instead of the gate controlling the flow in a shallow ditch (the old "2D" does have some depth ;-), they built up a pipe and the gate is the choke around it.

Well, that should help stem the pesky leakage current problems that plague the deep sub-micron technologies ...

Re: Intel Reinvents Transistors Using New 3-D Structure

#32

Post by SlipperySlope »

stephenjudkins wrote: post #14

From what I've heard, using 50% as much power for the same performance as the previous generation still will not be sufficient to bring Intel's Atom performance/energy consumption ratio to that offered by ARM chips. However, it's a huge leap in the right direction. Add better-designed power-saving features on the next generation of Atom chips, and future process shrinkages, and it's easy to see ARM's lead getting chi…

Interesting that Intel is seeking to fabricate ARM chips for Apple. I presume that Intel is pitching their best lithography process tech, i.e. 22nm. If Intel wrests Apples ARM CPU fabrication business away from Samsung - who competes with Apple on smartphones - then Intel would become a world leader in ARM CPU fabrication and pay ARM plenty of licensing fees!

Hardly the end of the world for ARM.

Re: Intel Reinvents Transistors Using New 3-D Structure

#33

Post by repiret »

tspiteri wrote: post #10
riledhel wrote: post #5

Earlier quoted context omitted.

Clock speed is just another metric, not the most important one. You also have chips that do several operations per clock cycle, low power consumption chips, chips that do parallel processing. All these factors affect performance as well.

That may be true for a processor, but when talking about transistors, I think that clock speed and power consumption are the metrics to measure.

I would argue that neither of those things are metrics to measure for a transistor, since they are affected by how its used. Properties of the transistor itself are what matter: size, drain and source capacitance, leakage current when off, drain-source voltage drop when on, and probably a dozen things I don't really know about.

Re: Intel Reinvents Transistors Using New 3-D Structure

#34

Post by Symmetry »

Awesome! The current a transistor can put out is porportional to the width over the length and chip designers usually want wide transistors[1], but wide transistors take up space which causes more line capacitance. This innovation will let people put more, wider transistors in a given area which will both increase the current they're putting out and decrease the capacitance they're fighting against, leading to higher frequencies[2].

[1] Wider transistors also cause more capacitance for the other transistors that are driving them, but for most modern designs this is smaller than line capacitance.

[2] Having transistors closer together can also help overcome speed-of-light delay. This can be important in caches.

EDIT: Also, some stuff I didn't notice until reading the Anandtech article is that the thinness of the silicon will give you the same artificial limitation of the depletion region that SOI does, leading to the same accelerated inversion. Oh, and better isolation from the base too. I don't think that I can explain that succinctly for non-EEs so go read Wikipedia on MOSFETs if you're interested.

Re: Intel Reinvents Transistors Using New 3-D Structure

#35

Post by sliverstorm »

SlipperySlope wrote: post #32
stephenjudkins wrote: post #14

From what I've heard, using 50% as much power for the same performance as the previous generation still will not be sufficient to bring Intel's Atom performance/energy consumption ratio to that offered by ARM chips. However, it's a huge leap in the right direction. Add better-designed power-saving features on the next generation of Atom chips, and future process shrinkages, and it's easy to see ARM's lead getting chi…

Interesting that Intel is seeking to fabricate ARM chips for Apple. I presume that Intel is pitching their best lithography process tech, i.e. 22nm. If Intel wrests Apples ARM CPU fabrication business away from Samsung - who competes with Apple on smartphones - then Intel would become a world leader in ARM CPU fabrication and pay ARM plenty of licensing fees! Hardly the end of the world for ARM.

The risk would be once Intel is the world's source of ARM CPU's, suddenly ARM's biggest competitor has a chokehold on the market's access to their silicon.

It would basically come down to whether Intel chose to embrace ARM, or tried to use the new position to quietly strangle it.

Re: Intel Reinvents Transistors Using New 3-D Structure

#36

Post by nextparadigms »

wmf wrote: post #25
nextparadigms wrote: post #20

Earlier quoted context omitted.

Atom is 2 generations behind in the manufacturing process compared to this. They'll barely start making them at 32 nm next year, and that will last for another 2 years.

Intel recently announced that they're going to catch up Atom (semi-misleadingly marketed as "faster than Moore's Law") so they're at 45 nm now, they'll release 32 nm Atom later this year and 22 nm Atom in early 2012.

That's not what they meant. They meant that instead of doubling Atom in performance every 18-24 months(have they even done that so far?), they'll try to double it every 12 months, just like the ARM chips are currently doing.

They can't switch the manufacturing process every year.

Re: Intel Reinvents Transistors Using New 3-D Structure

#38

Post by nextparadigms »

I think this will mostly help increase the life expectancy of the Moore's Law by another 10 years or so. When we'll get to 11nm or whatever is the limit, we'll just start stacking layers of transistors on each other. That will only work until the chips become too thick, though.

Re: Intel Reinvents Transistors Using New 3-D Structure

#39

Post by daeken »

Symmetry wrote: post #34

Awesome! The current a transistor can put out is porportional to the width over the length and chip designers usually want wide transistors[1], but wide transistors take up space which causes more line capacitance. This innovation will let people put more, wider transistors in a given area which will both increase the current they're putting out and decrease the capacitance they're fighting against, leading to higher…

> Having transistors closer together can also help overcome speed-of-light delay. This can be important in caches.

But in this case, while they take up less space, the distance is the same -- they're simply traveling up and over, rather than just over. Unless I'm missing something here.

Re: Intel Reinvents Transistors Using New 3-D Structure

#40

Post by SlipperySlope »

SlipperySlope wrote: post #18

Curious as to what clock speeds will be available when Ivy Bridge is released in the first half of 2012? If one expects a 37% performance increase at low voltages, then what would be the performance increase at standard voltage? 20% or so?

Anantech gives a gate-delay chart and explains that Ivy Bridge will be 18% faster at the standard voltage compared to Sandy Bridge. That might mean Ivy Bridge CPU parts at 4 GHz as compared with Sandy Bridge parts at currently at 3.4 GHz.
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