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TSMC to Mass Produce Breakthrough 2nm Mbcfet Transistors in 2024

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31–40 of 66 posts

Re: TSMC to Mass Produce Breakthrough 2nm Mbcfet Transistors in 2024

#31
post #19

Earlier quoted context omitted.

Intel is more like 3 steps behind, one of their shoes is missing and the other is missing laces

Having lived inside similar but much smaller dramas, it smells to me like Intel is titrating bad news. There was a goal. The goal became PR. Someone in management began to believe the PR, and turned it into a promise, predicated on 'and then a miracle occurs' (the engineers figure out how to do some things that haven't been done before). The engineers keep trying to explain how nobody has done this before because you…

There's almost no useful public insider information about the actual state of Intel's next gen technologies. We only know what is actually shipping and promises in PR slides. Sometimes I wonder if they don't know much more inside the company. There's roadmaps, projects, timelines, factories, teams, project managers, middle managers etc. but nobody has a clear picture of what's actually necessary and what's going to work in time. Engineers overpromise on the timeline, managers misreport "minor" hangups and upper management is left in the dark until it's much too late to change horses. Then there's stories of the old guard of engineers leaving but the replacements aren't getting up to speed quickly. Management even needs to consider outsourcing production to other companies because their homegrown engineering failed them time and time again lately. I really hope the core of the company is still solid and they get their act together soon.

Re: TSMC to Mass Produce Breakthrough 2nm Mbcfet Transistors in 2024

#32
post #27

Earlier quoted context omitted.

The number 7nm 5nm etc. ceased to refer anything physical after the technology moved on from planar transistors. Now it's just a commercial name for a generation. The most important dimensions are the gate pitch and metal pitch. For TSMC's 7nm process they are something like 60 and 40 nm and go down in the future to something like 30 nm and 20 nm in the 2nm process. Fin width might be the closest thing to commercial…

That's interesting, I saw a hobbyist photo lithography setup the other year that was able to etch metal with a resolution of 20nm.

That's really not possible. 20um probably. Micro not nano.

Re: TSMC to Mass Produce Breakthrough 2nm Mbcfet Transistors in 2024

#33
post #27

Earlier quoted context omitted.

The number 7nm 5nm etc. ceased to refer anything physical after the technology moved on from planar transistors. Now it's just a commercial name for a generation. The most important dimensions are the gate pitch and metal pitch. For TSMC's 7nm process they are something like 60 and 40 nm and go down in the future to something like 30 nm and 20 nm in the 2nm process. Fin width might be the closest thing to commercial…

That's interesting, I saw a hobbyist photo lithography setup the other year that was able to etch metal with a resolution of 20nm.

I recall this but don't remember seeing anything smaller being posted. Sub 100nm for a hobbiest would be pretty awesome. https://youtu.be/YAPt_DcWAvw

Re: TSMC to Mass Produce Breakthrough 2nm Mbcfet Transistors in 2024

#34

Earlier quoted context omitted.

The number 7nm 5nm etc. ceased to refer anything physical after the technology moved on from planar transistors. Now it's just a commercial name for a generation. The most important dimensions are the gate pitch and metal pitch. For TSMC's 7nm process they are something like 60 and 40 nm and go down in the future to something like 30 nm and 20 nm in the 2nm process. Fin width might be the closest thing to commercial…

What's the MTr/mm2 for TSMC 5nm? 2nm? EDIT: looks like 173M for 5nm. https://en.m.wikipedia.org/wiki/5_nm_process

TSMC 5nm is 170 MTr/mm2. Then it's goes above 200 MTr/mm2

Intel 7nm is something like 200 MTr/mm2.

Re: TSMC to Mass Produce Breakthrough 2nm Mbcfet Transistors in 2024

#35
post #13

Can someone ELI5 how TSMC is able to produce sub-7nm chips? I know quantum tunneling and the like becomes an issue at this size. I don't have a great physics background so I'm struggling to find a simple enough explanation for how they are dealing with this. Is it not as big a deal as I may think?

The number 7nm 5nm etc. ceased to refer anything physical after the technology moved on from planar transistors. Now it's just a commercial name for a generation. The most important dimensions are the gate pitch and metal pitch. For TSMC's 7nm process they are something like 60 and 40 nm and go down in the future to something like 30 nm and 20 nm in the 2nm process. Fin width might be the closest thing to commercial…

Very interesting, thank you. So we're basically not nearly as close to "true" 7nm as I thought? Do companies like TSMC already have a plan as to how to deal with "true" 7nm or is a lot more research still needed?

Re: TSMC to Mass Produce Breakthrough 2nm Mbcfet Transistors in 2024

#36

Earlier quoted context omitted.

What's the MTr/mm2 for TSMC 5nm? 2nm? EDIT: looks like 173M for 5nm. https://en.m.wikipedia.org/wiki/5_nm_process

TSMC 5nm is 170 MTr/mm2. Then it's goes above 200 MTr/mm2 Intel 7nm is something like 200 MTr/mm2.

Any news on 2nm?

Re: TSMC to Mass Produce Breakthrough 2nm Mbcfet Transistors in 2024

#37
post #35

Earlier quoted context omitted.

The number 7nm 5nm etc. ceased to refer anything physical after the technology moved on from planar transistors. Now it's just a commercial name for a generation. The most important dimensions are the gate pitch and metal pitch. For TSMC's 7nm process they are something like 60 and 40 nm and go down in the future to something like 30 nm and 20 nm in the 2nm process. Fin width might be the closest thing to commercial…

Very interesting, thank you. So we're basically not nearly as close to "true" 7nm as I thought? Do companies like TSMC already have a plan as to how to deal with "true" 7nm or is a lot more research still needed?

According to this video using an electron scanning microscope on amd and Intel chips, the “7nm” or “10nm” number does not measure anything, and is effectively a process version number for marketing. From memory there is no single number for measuring transistors or efficiency, transistor density is useful, but it doesn’t tell you the performance or power usage.

https://youtu.be/1kQUXpZpLXI

Re: TSMC to Mass Produce Breakthrough 2nm Mbcfet Transistors in 2024

#38
post #29

Earlier quoted context omitted.

This exact scenario is parodied in the show Silicon Valley[0] It's probably fairly commonplace. [0] https://www.youtube.com/watch?v=QZ7m7mV864A

I can never decide if Mike Judge is really this good, or we are really this transparent that a mostly-outsider can peg us so accurately.

They have very good industry-insider consultants for the show. Plus, Mike Judge was a Silicon Valley engineer a long time ago, so I'm sure his experience gives him some insight into how to interpret the consultants and portray the modern incarnation.

Re: TSMC to Mass Produce Breakthrough 2nm Mbcfet Transistors in 2024

#39
post #16
post #13

Can someone ELI5 how TSMC is able to produce sub-7nm chips? I know quantum tunneling and the like becomes an issue at this size. I don't have a great physics background so I'm struggling to find a simple enough explanation for how they are dealing with this. Is it not as big a deal as I may think?

It's easy. You take a very small number, add the letters 'nm' to it, and then start sending out press-releases to the major media outlets. That number has nearly zero bearing on the actual physical sizes of the chip's components. The only people who know about the exact dimensions are the firms placing manufacturing contracts with TSMC.

>That number has nearly zero bearing on the actual physical sizes of the chip's components.

AFAIK the reason behind this madness is that the number previously did correspond to feature size, but then they discovered methods of increasing transistor density without decreasing the size of the components. Since the feature size was used in marketing as a proxy for transistor density, they felt it was ultimately justified to decrease the number. After all, if your enhanced 32nm process provided the same transistor density as your competitor's 22nm process, why shouldn't you market your process as "22nm"?

Re: TSMC to Mass Produce Breakthrough 2nm Mbcfet Transistors in 2024

#40
post #13

Can someone ELI5 how TSMC is able to produce sub-7nm chips? I know quantum tunneling and the like becomes an issue at this size. I don't have a great physics background so I'm struggling to find a simple enough explanation for how they are dealing with this. Is it not as big a deal as I may think?

Not the explanation you're looking for, but the CTO at TSMC co-invented the modern FinFET transistor. They've probably good a really good grasp on what issues block development of smaller features, and know how to find ways around those limits.

https://spectrum.ieee.org/semiconductors/devices/how-the-fat...

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