Earlier quoted context omitted.
Intel is more like 3 steps behind, one of their shoes is missing and the other is missing laces
Having lived inside similar but much smaller dramas, it smells to me like Intel is titrating bad news. There was a goal. The goal became PR. Someone in management began to believe the PR, and turned it into a promise, predicated on 'and then a miracle occurs' (the engineers figure out how to do some things that haven't been done before). The engineers keep trying to explain how nobody has done this before because you…
TSMC to Mass Produce Breakthrough 2nm Mbcfet Transistors in 2024
31–40 of 66 posts
Re: TSMC to Mass Produce Breakthrough 2nm Mbcfet Transistors in 2024
#32Earlier quoted context omitted.
The number 7nm 5nm etc. ceased to refer anything physical after the technology moved on from planar transistors. Now it's just a commercial name for a generation. The most important dimensions are the gate pitch and metal pitch. For TSMC's 7nm process they are something like 60 and 40 nm and go down in the future to something like 30 nm and 20 nm in the 2nm process. Fin width might be the closest thing to commercial…
That's interesting, I saw a hobbyist photo lithography setup the other year that was able to etch metal with a resolution of 20nm.
Re: TSMC to Mass Produce Breakthrough 2nm Mbcfet Transistors in 2024
#33Earlier quoted context omitted.
The number 7nm 5nm etc. ceased to refer anything physical after the technology moved on from planar transistors. Now it's just a commercial name for a generation. The most important dimensions are the gate pitch and metal pitch. For TSMC's 7nm process they are something like 60 and 40 nm and go down in the future to something like 30 nm and 20 nm in the 2nm process. Fin width might be the closest thing to commercial…
That's interesting, I saw a hobbyist photo lithography setup the other year that was able to etch metal with a resolution of 20nm.
Re: TSMC to Mass Produce Breakthrough 2nm Mbcfet Transistors in 2024
#34Earlier quoted context omitted.
The number 7nm 5nm etc. ceased to refer anything physical after the technology moved on from planar transistors. Now it's just a commercial name for a generation. The most important dimensions are the gate pitch and metal pitch. For TSMC's 7nm process they are something like 60 and 40 nm and go down in the future to something like 30 nm and 20 nm in the 2nm process. Fin width might be the closest thing to commercial…
What's the MTr/mm2 for TSMC 5nm? 2nm? EDIT: looks like 173M for 5nm. https://en.m.wikipedia.org/wiki/5_nm_process
Intel 7nm is something like 200 MTr/mm2.
Re: TSMC to Mass Produce Breakthrough 2nm Mbcfet Transistors in 2024
#35Can someone ELI5 how TSMC is able to produce sub-7nm chips? I know quantum tunneling and the like becomes an issue at this size. I don't have a great physics background so I'm struggling to find a simple enough explanation for how they are dealing with this. Is it not as big a deal as I may think?
The number 7nm 5nm etc. ceased to refer anything physical after the technology moved on from planar transistors. Now it's just a commercial name for a generation. The most important dimensions are the gate pitch and metal pitch. For TSMC's 7nm process they are something like 60 and 40 nm and go down in the future to something like 30 nm and 20 nm in the 2nm process. Fin width might be the closest thing to commercial…
Re: TSMC to Mass Produce Breakthrough 2nm Mbcfet Transistors in 2024
#36Re: TSMC to Mass Produce Breakthrough 2nm Mbcfet Transistors in 2024
#37Earlier quoted context omitted.
The number 7nm 5nm etc. ceased to refer anything physical after the technology moved on from planar transistors. Now it's just a commercial name for a generation. The most important dimensions are the gate pitch and metal pitch. For TSMC's 7nm process they are something like 60 and 40 nm and go down in the future to something like 30 nm and 20 nm in the 2nm process. Fin width might be the closest thing to commercial…
Very interesting, thank you. So we're basically not nearly as close to "true" 7nm as I thought? Do companies like TSMC already have a plan as to how to deal with "true" 7nm or is a lot more research still needed?
Re: TSMC to Mass Produce Breakthrough 2nm Mbcfet Transistors in 2024
#38Earlier quoted context omitted.
This exact scenario is parodied in the show Silicon Valley[0] It's probably fairly commonplace. [0] https://www.youtube.com/watch?v=QZ7m7mV864A
I can never decide if Mike Judge is really this good, or we are really this transparent that a mostly-outsider can peg us so accurately.
Re: TSMC to Mass Produce Breakthrough 2nm Mbcfet Transistors in 2024
#39Can someone ELI5 how TSMC is able to produce sub-7nm chips? I know quantum tunneling and the like becomes an issue at this size. I don't have a great physics background so I'm struggling to find a simple enough explanation for how they are dealing with this. Is it not as big a deal as I may think?
It's easy. You take a very small number, add the letters 'nm' to it, and then start sending out press-releases to the major media outlets. That number has nearly zero bearing on the actual physical sizes of the chip's components. The only people who know about the exact dimensions are the firms placing manufacturing contracts with TSMC.
AFAIK the reason behind this madness is that the number previously did correspond to feature size, but then they discovered methods of increasing transistor density without decreasing the size of the components. Since the feature size was used in marketing as a proxy for transistor density, they felt it was ultimately justified to decrease the number. After all, if your enhanced 32nm process provided the same transistor density as your competitor's 22nm process, why shouldn't you market your process as "22nm"?
Re: TSMC to Mass Produce Breakthrough 2nm Mbcfet Transistors in 2024
#40Can someone ELI5 how TSMC is able to produce sub-7nm chips? I know quantum tunneling and the like becomes an issue at this size. I don't have a great physics background so I'm struggling to find a simple enough explanation for how they are dealing with this. Is it not as big a deal as I may think?
https://spectrum.ieee.org/semiconductors/devices/how-the-fat...