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TSMC Talks 7nm, 5nm, Yield, and Next-Gen 5G and HPC Packaging

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31–40 of 79 posts

Re: TSMC Talks 7nm, 5nm, Yield, and Next-Gen 5G and HPC Packaging

#31
post #20

Earlier quoted context omitted.

I think an important difference is that EUV exists now.

That’s how you make the chip. I’m not doubting that you can get manufacturing smaller, for a while[0]. But will it still work? You’re getting into the domain where electrons start tunneling across transistors and such. There is a wall that we will hit where lithography can take us no further—we’ll need atomic precision to break through that wall. It’s just a question of where that wall is... [0]: Higher frequency UV…

> There is a wall that we will hit where lithography can take us no further

This is something being said every few years. There were times when people were telling of 1 micron being "the wall."

Re: TSMC Talks 7nm, 5nm, Yield, and Next-Gen 5G and HPC Packaging

#32
post #25

Earlier quoted context omitted.

I hope you're right, but it's hard to imagine they aren't going to hit an unexpected wall at some point. The question is where is the wall? Basically you can never predict and unknown unknown.

>I hope you're right, 5nm started risk production were direct from TSMC report. They are expecting even faster ramp than 7nm. And TSMC has a history of being very conservative. Their approach has been iteration rather than a leap like Intel did. And you can bet it will arrive on scheduled for next year's Apple iPhone. There are roadmap, tools, technique for 3nm ( As explained in the Article ) and even 2nm. So none of…

I bet yes, just the top dog clients will have to change. See, semiconductor companies might look like quite formidable, but the Internet companies like Facebook, Amazon, Google actually have more money then even them. They will pay.

For consumer electronics, there is genuinely no benefits now going to smaller nodes, but for something like a "single chip supercomputer" type products, made with the most over the top semi tech, there is no better client than them.

For them, they are basically turning joules into ad clicks, and thus money, much akin to that bitcoin thing, which up until few years ago was one of the biggest semiconductor consumer globally.

Re: TSMC Talks 7nm, 5nm, Yield, and Next-Gen 5G and HPC Packaging

#33
post #26
post #5

Earlier quoted context omitted.

yeah but how many nm are left? There's a phsyical limit to transistor size!

There is a lot of density that can be increased. The node size doesn't represent transistor size, not even the gate size.

What is the theoretical limit? I mean there should be end.

Re: TSMC Talks 7nm, 5nm, Yield, and Next-Gen 5G and HPC Packaging

#34
post #26

Earlier quoted context omitted.

There is a lot of density that can be increased. The node size doesn't represent transistor size, not even the gate size.

What is the theoretical limit? I mean there should be end.

Well, the diameter of a silicon atom is 0.2nm, so I would guess it's at least that with silicon-based computers.

Re: TSMC Talks 7nm, 5nm, Yield, and Next-Gen 5G and HPC Packaging

#35

Earlier quoted context omitted.

5nm isn't just on a whiteboard, it's in risk production already at TSMC. Volume production is slated for Q1 2020, less than a year away, and TSMC tend to be accurate with their estimates.

You could have said the same things about Intel and 7nm a few years ago. It’s not certain that they can de-risk it until they actually do.

>You could have said the same things about Intel and 7nm a few years ago.

Intel's 10nm and 7nm never went into Risk Production, Intel could lie about their progress because they were the only user of their Fab. And they never gave a precise definition, progress of their node, as they are not a Foundry business. Compared to TSMC Hundred of Customers relies on them being open and transparent with their progress. As long as Intel could continue to sell their Chips, it really doesn't matter which node they are on. Which is the reason Why Intel Custom Foundry never took off, they have held information to closely to themselves, and didn't treat their customer as parter in the likes of Samsung and TSMC.

Re: TSMC Talks 7nm, 5nm, Yield, and Next-Gen 5G and HPC Packaging

#37
post #32
post #25

Earlier quoted context omitted.

>I hope you're right, 5nm started risk production were direct from TSMC report. They are expecting even faster ramp than 7nm. And TSMC has a history of being very conservative. Their approach has been iteration rather than a leap like Intel did. And you can bet it will arrive on scheduled for next year's Apple iPhone. There are roadmap, tools, technique for 3nm ( As explained in the Article ) and even 2nm. So none of…

I bet yes, just the top dog clients will have to change. See, semiconductor companies might look like quite formidable, but the Internet companies like Facebook, Amazon, Google actually have more money then even them. They will pay. For consumer electronics, there is genuinely no benefits now going to smaller nodes, but for something like a "single chip supercomputer" type products, made with the most over the top se…

> Internet companies like Facebook, Amazon, Google actually have more money then even them. They will pay.

I agree. And this is where the market dynamics changes, it will be interesting when the cost / economics model changes how things will unfold. Especially Amazon as they are already designing their own ARM CPU for Cloud Services.

Re: TSMC Talks 7nm, 5nm, Yield, and Next-Gen 5G and HPC Packaging

#38
post #25

Earlier quoted context omitted.

I hope you're right, but it's hard to imagine they aren't going to hit an unexpected wall at some point. The question is where is the wall? Basically you can never predict and unknown unknown.

>I hope you're right, 5nm started risk production were direct from TSMC report. They are expecting even faster ramp than 7nm. And TSMC has a history of being very conservative. Their approach has been iteration rather than a leap like Intel did. And you can bet it will arrive on scheduled for next year's Apple iPhone. There are roadmap, tools, technique for 3nm ( As explained in the Article ) and even 2nm. So none of…

I'm not saying they're pipe dreams. I'm saying things go wrong sometimes. How many companies have never missed a deadline? I'm not even saying that to be argumentative - I am genuinely curious.

Re: TSMC Talks 7nm, 5nm, Yield, and Next-Gen 5G and HPC Packaging

#39
post #34

Earlier quoted context omitted.

What is the theoretical limit? I mean there should be end.

Well, the diameter of a silicon atom is 0.2nm, so I would guess it's at least that with silicon-based computers.

Not necessaraly.

The node size represents the equivalent 'gate' size of a standard transistor with similar performance characteristics.

By using better transistor designs, you can make the effective gate size much smaller than the actual gate size.

Re: TSMC Talks 7nm, 5nm, Yield, and Next-Gen 5G and HPC Packaging

#40
post #26

Earlier quoted context omitted.

There is a lot of density that can be increased. The node size doesn't represent transistor size, not even the gate size.

What is the theoretical limit? I mean there should be end.

The limit of information density is known as the Bekenstein bound.

https://en.m.wikipedia.org/wiki/Bekenstein_bound

It is derived through quantum mechanics and via the Plank constants and black hole physics.

Basically any more information squeezed together would turn into a black hole.

Though ordinary (non quantum) thermodynamics limits information density well before this bound.

As to what happens in the next decades with the good old Silicon stuff. Well, nobody knows just yet, but 3nm is what anyone realistically talks about, and just sci-fi tech after that.

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